mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 01:50:53 +07:00
c4df5489e4
This patch introduces viafb_shared and is the beginning of a smooth transition to use it. viafb_shared should contain all general, non-surface specific data that should be shared along all viafb framebuffers while viafb_par should only contain things that are specific to each surface or in other words extend fb_info. This change is intended to clean the dual/multi framebuffer handling up. This removes the annoyance that viafbinfo1->par points to a different structure than viaparinfo1. As the last change is fundamental it is difficult to ensure that all parts of the driver do not depend on the previous brokenness but the chance of regressions is very low. Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: Scott Fang <ScottFang@viatech.com.cn> Cc: Joseph Chan <JosephChan@via.com.tw> Cc: Harald Welte <laforge@gnumonks.org> Cc: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
307 lines
7.9 KiB
C
307 lines
7.9 KiB
C
/*
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* Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
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* Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public
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* License as published by the Free Software Foundation;
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* either version 2, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
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* the implied warranty of MERCHANTABILITY or FITNESS FOR
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* A PARTICULAR PURPOSE.See the GNU General Public License
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* for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include "global.h"
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u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information
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*plvds_setting_info, struct lvds_chip_information *plvds_chip_info,
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u8 index)
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{
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u8 data;
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viaparinfo->shared->i2c_stuff.i2c_port = plvds_chip_info->i2c_port;
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viafb_i2c_readbyte(plvds_chip_info->lvds_chip_slave_addr, index, &data);
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return data;
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}
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void viafb_gpio_i2c_write_mask_lvds(struct lvds_setting_information
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*plvds_setting_info, struct lvds_chip_information
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*plvds_chip_info, struct IODATA io_data)
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{
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int index, data;
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viaparinfo->shared->i2c_stuff.i2c_port = plvds_chip_info->i2c_port;
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index = io_data.Index;
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data = viafb_gpio_i2c_read_lvds(plvds_setting_info, plvds_chip_info,
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index);
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data = (data & (~io_data.Mask)) | io_data.Data;
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viafb_i2c_writebyte(plvds_chip_info->lvds_chip_slave_addr, index, data);
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}
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void viafb_init_lvds_vt1636(struct lvds_setting_information
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*plvds_setting_info, struct lvds_chip_information *plvds_chip_info)
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{
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int reg_num, i;
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/* Common settings: */
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reg_num = ARRAY_SIZE(COMMON_INIT_TBL_VT1636);
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for (i = 0; i < reg_num; i++) {
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info,
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COMMON_INIT_TBL_VT1636[i]);
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}
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/* Input Data Mode Select */
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if (plvds_setting_info->device_lcd_dualedge) {
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info,
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DUAL_CHANNEL_ENABLE_TBL_VT1636[0]);
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} else {
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info,
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SINGLE_CHANNEL_ENABLE_TBL_VT1636[0]);
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}
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if (plvds_setting_info->LCDDithering) {
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info,
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DITHERING_ENABLE_TBL_VT1636[0]);
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} else {
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info,
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DITHERING_DISABLE_TBL_VT1636[0]);
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}
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}
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void viafb_enable_lvds_vt1636(struct lvds_setting_information
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*plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info)
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{
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
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VDD_ON_TBL_VT1636[0]);
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/* Pad on: */
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switch (plvds_chip_info->output_interface) {
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case INTERFACE_DVP0:
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{
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viafb_write_reg_mask(SR1E, VIASR, 0xC0, 0xC0);
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break;
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}
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case INTERFACE_DVP1:
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{
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viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30);
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break;
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}
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case INTERFACE_DFP_LOW:
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{
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viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x03);
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break;
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}
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case INTERFACE_DFP_HIGH:
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{
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viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x0C);
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break;
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}
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}
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}
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void viafb_disable_lvds_vt1636(struct lvds_setting_information
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*plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info)
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{
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
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VDD_OFF_TBL_VT1636[0]);
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/* Pad off: */
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switch (plvds_chip_info->output_interface) {
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case INTERFACE_DVP0:
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{
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viafb_write_reg_mask(SR1E, VIASR, 0x00, 0xC0);
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break;
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}
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case INTERFACE_DVP1:
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{
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viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30);
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break;
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}
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case INTERFACE_DFP_LOW:
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{
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viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x03);
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break;
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}
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case INTERFACE_DFP_HIGH:
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{
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viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0C);
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break;
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}
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}
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}
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bool viafb_lvds_identify_vt1636(void)
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{
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u8 Buffer[2];
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DEBUG_MSG(KERN_INFO "viafb_lvds_identify_vt1636.\n");
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/* Sense VT1636 LVDS Transmiter */
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viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
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VT1636_LVDS_I2C_ADDR;
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/* Check vendor ID first: */
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viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info.
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lvds_chip_slave_addr,
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0x00, &Buffer[0]);
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viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info.
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lvds_chip_slave_addr,
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0x01, &Buffer[1]);
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if (!((Buffer[0] == 0x06) && (Buffer[1] == 0x11)))
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return false;
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/* Check Chip ID: */
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viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info.
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lvds_chip_slave_addr,
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0x02, &Buffer[0]);
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viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info.
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lvds_chip_slave_addr,
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0x03, &Buffer[1]);
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if ((Buffer[0] == 0x45) && (Buffer[1] == 0x33)) {
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viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
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VT1636_LVDS;
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return true;
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}
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return false;
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}
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static int get_clk_range_index(u32 Clk)
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{
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if (Clk < DPA_CLK_30M)
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return DPA_CLK_RANGE_30M;
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else if (Clk < DPA_CLK_50M)
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return DPA_CLK_RANGE_30_50M;
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else if (Clk < DPA_CLK_70M)
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return DPA_CLK_RANGE_50_70M;
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else if (Clk < DPA_CLK_100M)
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return DPA_CLK_RANGE_70_100M;
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else if (Clk < DPA_CLK_150M)
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return DPA_CLK_RANGE_100_150M;
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else
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return DPA_CLK_RANGE_150M;
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}
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static int get_lvds_dpa_setting_index(int panel_size_id,
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struct VT1636_DPA_SETTING *p_vt1636_dpasetting_tbl,
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int tbl_size)
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{
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int i;
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for (i = 0; i < tbl_size; i++) {
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if (panel_size_id == p_vt1636_dpasetting_tbl->PanelSizeID)
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return i;
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p_vt1636_dpasetting_tbl++;
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}
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return 0;
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}
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static void set_dpa_vt1636(struct lvds_setting_information
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*plvds_setting_info, struct lvds_chip_information *plvds_chip_info,
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struct VT1636_DPA_SETTING *p_vt1636_dpa_setting)
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{
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struct IODATA io_data;
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io_data.Index = 0x09;
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io_data.Mask = 0x1F;
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io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST1;
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
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plvds_chip_info, io_data);
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io_data.Index = 0x08;
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io_data.Mask = 0x0F;
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io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST2;
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viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
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io_data);
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}
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void viafb_vt1636_patch_skew_on_vt3324(
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struct lvds_setting_information *plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info)
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{
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int index, size;
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DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3324.\n");
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/* Graphics DPA settings: */
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index = get_clk_range_index(plvds_setting_info->vclk);
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viafb_set_dpa_gfx(plvds_chip_info->output_interface,
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&GFX_DPA_SETTING_TBL_VT3324[index]);
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/* LVDS Transmitter DPA settings: */
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size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3324);
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index =
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get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id,
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VT1636_DPA_SETTING_TBL_VT3324, size);
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set_dpa_vt1636(plvds_setting_info, plvds_chip_info,
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&VT1636_DPA_SETTING_TBL_VT3324[index]);
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}
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void viafb_vt1636_patch_skew_on_vt3327(
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struct lvds_setting_information *plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info)
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{
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int index, size;
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DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3327.\n");
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/* Graphics DPA settings: */
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index = get_clk_range_index(plvds_setting_info->vclk);
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viafb_set_dpa_gfx(plvds_chip_info->output_interface,
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&GFX_DPA_SETTING_TBL_VT3327[index]);
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/* LVDS Transmitter DPA settings: */
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size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3327);
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index =
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get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id,
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VT1636_DPA_SETTING_TBL_VT3327, size);
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set_dpa_vt1636(plvds_setting_info, plvds_chip_info,
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&VT1636_DPA_SETTING_TBL_VT3327[index]);
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}
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void viafb_vt1636_patch_skew_on_vt3364(
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struct lvds_setting_information *plvds_setting_info,
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struct lvds_chip_information *plvds_chip_info)
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{
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int index;
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DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3364.\n");
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/* Graphics DPA settings: */
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index = get_clk_range_index(plvds_setting_info->vclk);
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viafb_set_dpa_gfx(plvds_chip_info->output_interface,
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&GFX_DPA_SETTING_TBL_VT3364[index]);
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}
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