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fa6749d40e
The memory frequency scaling will be managed by tegra20-devfreq driver and PM QoS once all the prerequisite patches will get upstreamed. The parent clock is now managed by the clock driver and we also should assume that PLLM rate can't be changed on some devices (Galaxy Tab 10.1 for example). Altogether there is no point in touching of clock's rate from the EMC driver. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| mc.c | ||
| mc.h | ||
| tegra20-emc.c | ||
| tegra20.c | ||
| tegra30.c | ||
| tegra114.c | ||
| tegra124-emc.c | ||
| tegra124.c | ||
| tegra186.c | ||
| tegra210.c | ||