mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 23:50:53 +07:00
1fa9be72b5
For systems where the core cycles are not a usable tick source (like SMP or cycles gets updated), enable gptimer0 as an alternative. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
166 lines
2.9 KiB
Plaintext
166 lines
2.9 KiB
Plaintext
if (BF538 || BF539)
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source "arch/blackfin/mach-bf538/boards/Kconfig"
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menu "BF538 Specific Configuration"
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comment "Interrupt Priority Assignment"
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menu "Priority"
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config IRQ_PLL_WAKEUP
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int "IRQ_PLL_WAKEUP"
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default 7
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config IRQ_DMA0_ERROR
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int "IRQ_DMA0_ERROR"
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default 7
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config IRQ_PPI_ERROR
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int "IRQ_PPI_ERROR"
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default 7
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config IRQ_SPORT0_ERROR
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int "IRQ_SPORT0_ERROR"
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default 7
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config IRQ_SPORT1_ERROR
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int "IRQ_SPORT1_ERROR"
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default 7
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config IRQ_SPI0_ERROR
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int "IRQ_SPI0_ERROR"
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default 7
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config IRQ_UART0_ERROR
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int "IRQ_UART0_ERROR"
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default 7
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config IRQ_RTC
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int "IRQ_RTC"
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default 8
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config IRQ_PPI
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int "IRQ_PPI"
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default 8
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config IRQ_SPORT0_RX
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int "IRQ_SPORT0_RX"
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default 9
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config IRQ_SPORT0_TX
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int "IRQ_SPORT0_TX"
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default 9
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config IRQ_SPORT1_RX
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int "IRQ_SPORT1_RX"
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default 9
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config IRQ_SPORT1_TX
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int "IRQ_SPORT1_TX"
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default 9
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config IRQ_SPI0
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int "IRQ_SPI0"
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default 10
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config IRQ_UART0_RX
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int "IRQ_UART0_RX"
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default 10
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config IRQ_UART0_TX
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int "IRQ_UART0_TX"
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default 10
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config IRQ_TIMER0
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int "IRQ_TIMER0"
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default 7 if TICKSOURCE_GPTMR0
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default 8
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config IRQ_TIMER1
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int "IRQ_TIMER1"
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default 11
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config IRQ_TIMER2
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int "IRQ_TIMER2"
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default 11
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config IRQ_PORTF_INTA
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int "IRQ_PORTF_INTA"
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default 12
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config IRQ_PORTF_INTB
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int "IRQ_PORTF_INTB"
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default 12
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config IRQ_MEM0_DMA0
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int "IRQ_MEM0_DMA0"
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default 13
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config IRQ_MEM0_DMA1
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int "IRQ_MEM0_DMA1"
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default 13
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config IRQ_WATCH
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int "IRQ_WATCH"
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default 13
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config IRQ_DMA1_ERROR
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int "IRQ_DMA1_ERROR"
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default 7
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config IRQ_SPORT2_ERROR
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int "IRQ_SPORT2_ERROR"
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default 7
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config IRQ_SPORT3_ERROR
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int "IRQ_SPORT3_ERROR"
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default 7
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config IRQ_SPI1_ERROR
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int "IRQ_SPI1_ERROR"
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default 7
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config IRQ_SPI2_ERROR
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int "IRQ_SPI2_ERROR"
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default 7
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config IRQ_UART1_ERROR
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int "IRQ_UART1_ERROR"
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default 7
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config IRQ_UART2_ERROR
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int "IRQ_UART2_ERROR"
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default 7
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config IRQ_CAN_ERROR
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int "IRQ_CAN_ERROR"
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default 7
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config IRQ_SPORT2_RX
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int "IRQ_SPORT2_RX"
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default 9
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config IRQ_SPORT2_TX
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int "IRQ_SPORT2_TX"
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default 9
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config IRQ_SPORT3_RX
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int "IRQ_SPORT3_RX"
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default 9
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config IRQ_SPORT3_TX
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int "IRQ_SPORT3_TX"
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default 9
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config IRQ_SPI1
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int "IRQ_SPI1"
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default 10
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config IRQ_SPI2
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int "IRQ_SPI2"
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default 10
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config IRQ_UART1_RX
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int "IRQ_UART1_RX"
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default 10
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config IRQ_UART1_TX
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int "IRQ_UART1_TX"
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default 10
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config IRQ_UART2_RX
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int "IRQ_UART2_RX"
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default 10
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config IRQ_UART2_TX
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int "IRQ_UART2_TX"
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default 10
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config IRQ_TWI0
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int "IRQ_TWI0"
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default 11
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config IRQ_TWI1
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int "IRQ_TWI1"
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default 11
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config IRQ_CAN_RX
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int "IRQ_CAN_RX"
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default 11
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config IRQ_CAN_TX
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int "IRQ_CAN_TX"
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default 11
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config IRQ_MEM1_DMA0
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int "IRQ_MEM1_DMA0"
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default 13
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config IRQ_MEM1_DMA1
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int "IRQ_MEM1_DMA1"
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default 13
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help
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Enter the priority numbers between 7-13 ONLY. Others are Reserved.
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This applies to all the above. It is not recommended to assign the
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highest priority number 7 to UART or any other device.
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endmenu
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endmenu
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endif
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