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4da722ca19
Pretty much any node can have a status property, so it doesn't need to be in examples. Converted with the following command and removed examples with SoC and board specific splits: git grep -l -E 'status.*=.*' Documentation/devicetree/ | xargs sed -i -E '/\sstatus.*=.*"(disabled|ok|okay)/d' Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Rob Herring <robh@kernel.org>
48 lines
1.5 KiB
Plaintext
48 lines
1.5 KiB
Plaintext
* Marvell Armada 380/XP Buffer Manager driver (BM)
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Required properties:
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- compatible: should be "marvell,armada-380-neta-bm".
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- reg: address and length of the register set for the device.
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- clocks: a pointer to the reference clock for this device.
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- internal-mem: a phandle to BM internal SRAM definition.
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Optional properties (port):
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- pool<0 : 3>,capacity: size of external buffer pointers' ring maintained
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in DRAM. Can be set for each pool (id 0 : 3) separately. The value has
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to be chosen between 128 and 16352 and it also has to be aligned to 32.
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Otherwise the driver would adjust a given number or choose default if
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not set.
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- pool<0 : 3>,pkt-size: maximum size of a packet accepted by a given buffer
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pointers' pool (id 0 : 3). It will be taken into consideration only when pool
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type is 'short'. For 'long' ones it would be overridden by port's MTU.
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If not set a driver will choose a default value.
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In order to see how to hook the BM to a given ethernet port, please
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refer to Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt.
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Example:
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- main node:
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bm: bm@c8000 {
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compatible = "marvell,armada-380-neta-bm";
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reg = <0xc8000 0xac>;
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clocks = <&gateclk 13>;
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internal-mem = <&bm_bppi>;
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pool2,capacity = <4096>;
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pool1,pkt-size = <512>;
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};
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- internal SRAM node:
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bm_bppi: bm-bppi {
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compatible = "mmio-sram";
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reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;
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ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&gateclk 13>;
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};
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