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10a6a69756
This reverts commit b07815d4ea.
The reverted commit was merged into v4-15-rc1 by mistake: it was taken
from the IMX tree but the patch has never been sent to linux-mtd nor
reviewed by any spi-nor maintainers.
Actually, it would have been rejected since we add new values for the
'compatible' DT property only for SPI NOR memories that don't support
the JEDEC READ ID op code (0x9F).
Both en25s64 and sst25wf040b support the JEDEC READ ID op code, hence
should use the "jedec,spi-nor" string alone as 'compatible' value.
See the following link for more details:
http://lists.infradead.org/pipermail/linux-mtd/2017-November/077425.html
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
83 lines
2.6 KiB
Plaintext
83 lines
2.6 KiB
Plaintext
* SPI NOR flash: ST M25Pxx (and similar) serial flash chips
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Required properties:
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- #address-cells, #size-cells : Must be present if the device has sub-nodes
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representing partitions.
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- compatible : May include a device-specific string consisting of the
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manufacturer and name of the chip. A list of supported chip
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names follows.
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Must also include "jedec,spi-nor" for any SPI NOR flash that can
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be identified by the JEDEC READ ID opcode (0x9F).
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Supported chip names:
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at25df321a
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at25df641
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at26df081a
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mr25h128
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mr25h256
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mr25h10
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mr25h40
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mx25l4005a
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mx25l1606e
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mx25l6405d
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mx25l12805d
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mx25l25635e
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n25q064
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n25q128a11
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n25q128a13
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n25q512a
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s25fl256s1
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s25fl512s
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s25sl12801
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s25fl008k
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s25fl064k
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sst25vf040b
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m25p40
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m25p80
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m25p16
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m25p32
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m25p64
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m25p128
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w25x80
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w25x32
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w25q32
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w25q64
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w25q32dw
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w25q80bl
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w25q128
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w25q256
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The following chip names have been used historically to
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designate quirky versions of flash chips that do not support the
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JEDEC READ ID opcode (0x9F):
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m25p05-nonjedec
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m25p10-nonjedec
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m25p20-nonjedec
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m25p40-nonjedec
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m25p80-nonjedec
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m25p16-nonjedec
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m25p32-nonjedec
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m25p64-nonjedec
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m25p128-nonjedec
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- reg : Chip-Select number
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- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
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Optional properties:
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- m25p,fast-read : Use the "fast read" opcode to read data from the chip instead
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of the usual "read" opcode. This opcode is not supported by
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all chips and support for it can not be detected at runtime.
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Refer to your chips' datasheet to check if this is supported
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by your chip.
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Example:
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flash: m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spansion,m25p80", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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m25p,fast-read;
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};
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