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The FCP IP cores include a version register that identifies which SoC model the IP is integrated in. SoC-specific compatible strings are not needed. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
34 lines
1.1 KiB
Plaintext
34 lines
1.1 KiB
Plaintext
Renesas R-Car Frame Compression Processor (FCP)
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-----------------------------------------------
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The FCP is a companion module of video processing modules in the Renesas R-Car
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Gen3 SoCs. It provides data compression and decompression, data caching, and
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conversion of AXI transactions in order to reduce the memory bandwidth.
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There are three types of FCP: FCP for Codec (FCPC), FCP for VSP (FCPV) and FCP
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for FDP (FCPF). Their configuration and behaviour depend on the module they
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are paired with. These DT bindings currently support the FCPV and FCPF.
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- compatible: Must be one or more of the following
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- "renesas,fcpv" for generic compatible 'FCP for VSP'
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- "renesas,fcpf" for generic compatible 'FCP for FDP'
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- reg: the register base and size for the device registers
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- clocks: Reference to the functional clock
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Optional properties:
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- power-domains : power-domain property defined with a power domain specifier
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to respective power domain.
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Device node example
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-------------------
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fcpvd1: fcp@fea2f000 {
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compatible = "renesas,fcpv";
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reg = <0 0xfea2f000 0 0x200>;
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clocks = <&cpg CPG_MOD 602>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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};
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