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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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07ffee59a7
Create separate functions to deal with instruction and data cache flushing. This way we can optimize them for the vairous cache types and arrangements used across the ColdFire family. For example the unified caches in the version 3 cores means we don't need to flush the instruction cache. For the version 2 cores that do not do data cacheing (or where we choose instruction cache only) we don't need to do any data flushing. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
80 lines
2.2 KiB
C
80 lines
2.2 KiB
C
#ifndef _M68KNOMMU_CACHEFLUSH_H
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#define _M68KNOMMU_CACHEFLUSH_H
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/*
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* (C) Copyright 2000-2010, Greg Ungerer <gerg@snapgear.com>
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*/
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#include <linux/mm.h>
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#include <asm/mcfsim.h>
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#define flush_cache_all() __flush_cache_all()
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#define flush_cache_mm(mm) do { } while (0)
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#define flush_cache_dup_mm(mm) do { } while (0)
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#define flush_cache_range(vma, start, end) do { } while (0)
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#define flush_cache_page(vma, vmaddr) do { } while (0)
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#define flush_dcache_range(start, len) __flush_dcache_all()
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
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#define flush_dcache_page(page) do { } while (0)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#define flush_icache_range(start, len) __flush_icache_all()
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#define flush_icache_page(vma,pg) do { } while (0)
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#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
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#define flush_cache_vmap(start, end) do { } while (0)
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#define flush_cache_vunmap(start, end) do { } while (0)
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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memcpy(dst, src, len)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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memcpy(dst, src, len)
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void mcf_cache_push(void);
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static inline void __flush_cache_all(void)
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{
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#ifdef CACHE_PUSH
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mcf_cache_push();
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#endif
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#ifdef CACHE_INVALIDATE
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__asm__ __volatile__ (
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"movel %0, %%d0\n\t"
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"movec %%d0, %%CACR\n\t"
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"nop\n\t"
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: : "i" (CACHE_INVALIDATE) : "d0" );
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#endif
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}
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/*
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* Some ColdFire parts implement separate instruction and data caches,
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* on those we should just flush the appropriate cache. If we don't need
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* to do any specific flushing then this will be optimized away.
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*/
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static inline void __flush_icache_all(void)
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{
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#ifdef CACHE_INVALIDATEI
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__asm__ __volatile__ (
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"movel %0, %%d0\n\t"
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"movec %%d0, %%CACR\n\t"
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"nop\n\t"
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: : "i" (CACHE_INVALIDATEI) : "d0" );
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#endif
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}
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static inline void __flush_dcache_all(void)
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{
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#ifdef CACHE_PUSH
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mcf_cache_push();
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#endif
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#ifdef CACHE_INVALIDATED
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__asm__ __volatile__ (
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"movel %0, %%d0\n\t"
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"movec %%d0, %%CACR\n\t"
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"nop\n\t"
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: : "i" (CACHE_INVALIDATED) : "d0" );
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#else
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/* Flush the wrtite buffer */
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__asm__ __volatile__ ( "nop" );
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#endif
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}
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#endif /* _M68KNOMMU_CACHEFLUSH_H */
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