linux_dsm_epyc7002/drivers/pci
Nicholas Johnson f924c26e4e PCI: Consider alignment of hot-added bridges when assigning resources
Change pci_bus_distribute_available_resources() to better handle bridges
with different resource alignment requirements.

The arguments io, mmio and mmio_pref represent the start and end
addresses of resource, into which we must fit the current bridge window.

The steps taken by pci_bus_distribute_available_resources():

  - For io, mmio and mmio_pref, increase .start to align with the alignment
    of the current bridge window (otherwise the current bridge window may
    not fit within the available range).

  - For io, mmio and mmio_pref, adjust the current bridge window to the
    size after the above.

  - Count the number of hotplug bridges and normal bridges on this bus.

  - If the total number of bridges is one, give that bridge all of the
    resources and return.

  - If there are no hotplug bridges, return.

  - For io, mmio and mmio_pref, increase .start by the amount required for
    each bridge resource on the bus for non hotplug bridges, giving extra
    room to make up for alignment of those resources.

  - For io, mmio and mmio_pref, calculate the resource size per hotplug
    bridge which is available after the previous steps.

  - For io, mmio and mmio_pref, distribute the resources to each hotplug
    bridge, with the sizes calculated above.

The motivation for fixing this is enabling devices that require greater
than 1MB alignment. This fixes the case where the user hot-adds devices
with BAR alignment >1MB and Linux fails to assign resources to it.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=199581
Link: https://lore.kernel.org/r/PSXP216MB0438C2BFD0FD3691ED9C83F4803C0@PSXP216MB0438.KORP216.PROD.OUTLOOK.COM
Reported-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Nicholas Johnson <nicholas.johnson-opensource@outlook.com.au>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-01-29 16:57:28 -06:00
..
controller Merge branch 'pci/trivial' 2019-11-28 08:54:55 -06:00
endpoint Merge branch 'remotes/lorenzo/pci/endpoint' 2019-11-28 08:54:42 -06:00
hotplug pci-v5.5-changes 2019-12-03 13:58:22 -08:00
pcie Merge branch 'pci/misc' 2019-11-28 08:54:32 -06:00
switch pci-v5.5-changes 2019-12-03 13:58:22 -08:00
access.c PCI/AER: Save AER Capability for suspend/resume 2019-10-18 17:05:42 -05:00
ats.c PCI/ATS: Remove unnecessary EXPORT_SYMBOL_GPL() 2019-10-15 16:39:11 -05:00
bus.c
ecam.c
host-bridge.c
iov.c Merge branch 'pci/trivial' 2019-11-28 08:54:55 -06:00
irq.c
Kconfig Merge branch 'pci/trivial' 2019-11-28 08:54:55 -06:00
Makefile PCI: Allow building PCIe things without PCIEPORTBUS 2019-11-21 07:52:33 -06:00
mmap.c
msi.c PCI/MSI: Fix incorrect MSI-X masking on resume 2019-11-26 13:10:29 -06:00
of.c PCI: Make devm_of_pci_get_host_bridge_resources() static 2019-11-20 17:00:14 +00:00
p2pdma.c
pci-acpi.c Merge branch 'pci/enumeration' 2019-09-23 16:10:08 -05:00
pci-bridge-emul.c PCI: pci-bridge-emul: Fix big-endian support 2019-10-17 12:42:48 +01:00
pci-bridge-emul.h PCI: pci-bridge-emul: Fix big-endian support 2019-10-17 12:42:48 +01:00
pci-driver.c PCI/PM: Add missing link delays required by the PCIe spec 2019-11-20 17:37:24 -06:00
pci-label.c
pci-mid.c
pci-pf-stub.c
pci-stub.c
pci-sysfs.c Merge branch 'pci/resource' 2019-11-28 08:54:36 -06:00
pci.c pci-v5.5-changes 2019-12-03 13:58:22 -08:00
pci.h Merge branch 'remotes/lorenzo/pci/mmio-dma-ranges' 2019-11-28 08:54:53 -06:00
probe.c Merge branch 'pci/trivial' 2019-11-28 08:54:55 -06:00
proc.c PCI: Add PCI_STD_NUM_BARS for the number of standard BARs 2019-10-14 10:22:26 -05:00
quirks.c Merge branch 'pci/trivial' 2019-11-28 08:54:55 -06:00
remove.c
rom.c
search.c
setup-bus.c PCI: Consider alignment of hot-added bridges when assigning resources 2020-01-29 16:57:28 -06:00
setup-irq.c
setup-res.c
slot.c
syscall.c
vc.c Merge branch 'pci/trivial' 2019-09-23 16:10:31 -05:00
vpd.c
xen-pcifront.c