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A USB HCD may have several PHYs which need to be configured before the the HCD starts working. This adds the documentation for such a USB HCD as well as a reference to the new "usb-hcd.txt" from all bindings that implement a USB HCD which support one USB PHY per port. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Tested-by: Yixun Lan <yixun.lan@amlogic.com> Tested-by: Neil Armstrong <narmstrong@baylibre.con> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
99 lines
3.8 KiB
Plaintext
99 lines
3.8 KiB
Plaintext
The device node for Mediatek USB3.0 DRD controller
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Required properties:
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- compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
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soc-model is the name of SoC, such as mt8173, mt2712 etc,
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when using "mediatek,mtu3" compatible string, you need SoC specific
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ones in addition, one of:
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- "mediatek,mt8173-mtu3"
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- reg : specifies physical base address and size of the registers
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- reg-names: should be "mac" for device IP and "ippc" for IP port control
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- interrupts : interrupt used by the device IP
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- power-domains : a phandle to USB power domain node to control USB's
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mtcmos
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- vusb33-supply : regulator of USB avdd3.3v
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- clocks : a list of phandle + clock-specifier pairs, one for each
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entry in clock-names
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- clock-names : must contain "sys_ck" for clock of controller,
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the following clocks are optional:
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"ref_ck", "mcu_ck" and "dam_ck";
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- phys : see usb-hcd.txt in the current directory
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- dr_mode : should be one of "host", "peripheral" or "otg",
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refer to usb/generic.txt
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Optional properties:
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- #address-cells, #size-cells : should be '2' if the device has sub-nodes
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with 'reg' property
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- ranges : allows valid 1:1 translation between child's address space and
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parent's address space
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- extcon : external connector for vbus and idpin changes detection, needed
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when supports dual-role mode.
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- vbus-supply : reference to the VBUS regulator, needed when supports
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dual-role mode.
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- pinctrl-names : a pinctrl state named "default" is optional, and need be
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defined if auto drd switch is enabled, that means the property dr_mode
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is set as "otg", and meanwhile the property "mediatek,enable-manual-drd"
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is not set.
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- pinctrl-0 : pin control group
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See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
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- maximum-speed : valid arguments are "super-speed", "high-speed" and
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"full-speed"; refer to usb/generic.txt
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- enable-manual-drd : supports manual dual-role switch via debugfs; usually
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used when receptacle is TYPE-A and also wants to support dual-role
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mode.
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- wakeup-source: enable USB remote wakeup of host mode.
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- mediatek,syscon-wakeup : phandle to syscon used to access the register
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of the USB wakeup glue layer between SSUSB and SPM; it depends on
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"wakeup-source", and has two arguments:
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- the first one : register base address of the glue layer in syscon;
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- the second one : hardware version of the glue layer
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- 1 : used by mt8173 etc
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- 2 : used by mt2712 etc
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- mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
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bit1 for u3port1, ... etc;
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additionally the properties from usb-hcd.txt (in the current directory) are
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supported.
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Sub-nodes:
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The xhci should be added as subnode to mtu3 as shown in the following example
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if host mode is enabled. The DT binding details of xhci can be found in:
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Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
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Example:
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ssusb: usb@11271000 {
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compatible = "mediatek,mt8173-mtu3";
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reg = <0 0x11271000 0 0x3000>,
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<0 0x11280700 0 0x0100>;
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reg-names = "mac", "ippc";
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
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phys = <&phy_port0 PHY_TYPE_USB3>,
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<&phy_port1 PHY_TYPE_USB2>;
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power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
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clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
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<&pericfg CLK_PERI_USB0>,
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<&pericfg CLK_PERI_USB1>;
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clock-names = "sys_ck", "ref_ck";
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vusb33-supply = <&mt6397_vusb_reg>;
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vbus-supply = <&usb_p0_vbus>;
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extcon = <&extcon_usb>;
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dr_mode = "otg";
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wakeup-source;
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mediatek,syscon-wakeup = <&pericfg 0x400 1>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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usb_host: xhci@11270000 {
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compatible = "mediatek,mt8173-xhci";
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reg = <0 0x11270000 0 0x1000>;
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reg-names = "mac";
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interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
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power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
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clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
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clock-names = "sys_ck", "ref_ck";
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vusb33-supply = <&mt6397_vusb_reg>;
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};
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};
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