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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-03 04:36:51 +07:00
48c8b96f21
Currently on the Lager board NFS timeouts/delays are seen when booting. That turned out to happen because the SoC's ETH_LINK signal turns on and off after each packet. It is connected to Micrel KSZ8041 PHY's LED0 signal. Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds to non-default 01 setting of the PHY control register 1 bits 14-15. The 'sh_eth' driver resets the PHY when opening the network device, so we have to set the mentioned bits back to 01 from the default 00 value which causes bouncing of ETH_LINK. That can be achieved using the PHY platform fixup mechanism if we also modify the driver to use it.. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
194 lines
5.8 KiB
C
194 lines
5.8 KiB
C
/*
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* Lager board support
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/gpio.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/leds.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/sh_mmcif.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/platform_data/gpio-rcar.h>
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#include <linux/platform_device.h>
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#include <linux/phy.h>
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#include <linux/regulator/fixed.h>
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#include <linux/regulator/machine.h>
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#include <linux/sh_eth.h>
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#include <mach/common.h>
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#include <mach/irqs.h>
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#include <mach/r8a7790.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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/* LEDS */
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static struct gpio_led lager_leds[] = {
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{
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.name = "led8",
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.gpio = RCAR_GP_PIN(5, 17),
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.default_state = LEDS_GPIO_DEFSTATE_ON,
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}, {
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.name = "led7",
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.gpio = RCAR_GP_PIN(4, 23),
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.default_state = LEDS_GPIO_DEFSTATE_ON,
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}, {
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.name = "led6",
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.gpio = RCAR_GP_PIN(4, 22),
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.default_state = LEDS_GPIO_DEFSTATE_ON,
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},
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};
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static __initdata struct gpio_led_platform_data lager_leds_pdata = {
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.leds = lager_leds,
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.num_leds = ARRAY_SIZE(lager_leds),
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};
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/* GPIO KEY */
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#define GPIO_KEY(c, g, d, ...) \
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{ .code = c, .gpio = g, .desc = d, .active_low = 1 }
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static struct gpio_keys_button gpio_buttons[] = {
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GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
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GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
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GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
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GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
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};
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static __initdata struct gpio_keys_platform_data lager_keys_pdata = {
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.buttons = gpio_buttons,
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.nbuttons = ARRAY_SIZE(gpio_buttons),
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};
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/* Fixed 3.3V regulator to be used by MMCIF */
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static struct regulator_consumer_supply fixed3v3_power_consumers[] =
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{
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REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
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};
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/* MMCIF */
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static struct sh_mmcif_plat_data mmcif1_pdata __initdata = {
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.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
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};
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static struct resource mmcif1_resources[] __initdata = {
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DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
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DEFINE_RES_IRQ(gic_spi(170)),
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};
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/* Ether */
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static struct sh_eth_plat_data ether_pdata __initdata = {
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.phy = 0x1,
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.edmac_endian = EDMAC_LITTLE_ENDIAN,
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.phy_interface = PHY_INTERFACE_MODE_RMII,
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.ether_link_active_low = 1,
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};
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static struct resource ether_resources[] __initdata = {
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DEFINE_RES_MEM(0xee700000, 0x400),
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DEFINE_RES_IRQ(gic_spi(162)),
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};
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static const struct pinctrl_map lager_pinctrl_map[] = {
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/* SCIF0 (CN19: DEBUG SERIAL0) */
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PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
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"scif0_data", "scif0"),
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/* SCIF1 (CN20: DEBUG SERIAL1) */
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PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
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"scif1_data", "scif1"),
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/* MMCIF1 */
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PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
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"mmc1_data8", "mmc1"),
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PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
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"mmc1_ctrl", "mmc1"),
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/* Ether */
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
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"eth_link", "eth"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
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"eth_mdio", "eth"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
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"eth_rmii", "eth"),
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
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"intc_irq0", "intc"),
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};
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static void __init lager_add_standard_devices(void)
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{
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r8a7790_clock_init();
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pinctrl_register_mappings(lager_pinctrl_map,
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ARRAY_SIZE(lager_pinctrl_map));
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r8a7790_pinmux_init();
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r8a7790_add_standard_devices();
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platform_device_register_data(&platform_bus, "leds-gpio", -1,
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&lager_leds_pdata,
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sizeof(lager_leds_pdata));
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platform_device_register_data(&platform_bus, "gpio-keys", -1,
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&lager_keys_pdata,
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sizeof(lager_keys_pdata));
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regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
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ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
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platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
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mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
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&mmcif1_pdata, sizeof(mmcif1_pdata));
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platform_device_register_resndata(&platform_bus, "r8a7790-ether", -1,
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ether_resources,
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ARRAY_SIZE(ether_resources),
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ðer_pdata, sizeof(ether_pdata));
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}
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/*
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* Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
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* to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
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* 14-15. We have to set them back to 01 from the default 00 value each time
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* the PHY is reset. It's also important because the PHY's LED0 signal is
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* connected to SoC's ETH_LINK signal and in the PHY's default mode it will
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* bounce on and off after each packet, which we apparently want to avoid.
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*/
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static int lager_ksz8041_fixup(struct phy_device *phydev)
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{
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u16 phyctrl1 = phy_read(phydev, 0x1e);
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phyctrl1 &= ~0xc000;
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phyctrl1 |= 0x4000;
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return phy_write(phydev, 0x1e, phyctrl1);
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}
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static void __init lager_init(void)
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{
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lager_add_standard_devices();
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phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
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}
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static const char *lager_boards_compat_dt[] __initdata = {
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"renesas,lager",
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NULL,
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};
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DT_MACHINE_START(LAGER_DT, "lager")
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.init_early = r8a7790_init_delay,
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.init_time = r8a7790_timer_init,
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.init_machine = lager_init,
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.dt_compat = lager_boards_compat_dt,
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MACHINE_END
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