mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-16 19:56:28 +07:00
f88d59fc2d
A recent update to dtc and changes to the default warnings introduced some new warnings in the DT binding examples: Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.example.dts:23.13-61: Warning (dma_ranges_format): /example-0/dram-controller@1c01000:dma-ranges: "dma-ranges" property has invalid length (12 bytes) (parent #address-cells == 1, child #address-cells == 2, #size-cells == 1) Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.example.dts:17.22-28.11: Warning (unit_address_vs_reg): /example-0/fpga-axi@0: node has a unit name, but no reg or ranges property Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.example.dts:34.13-54: Warning (dma_ranges_format): /example-0/memory-controller@2c00000:dma-ranges: "dma-ranges" property has invalid length (24 bytes) (parent #address-cells == 1, child #address-cells == 2, #size-cells == 2) Documentation/devicetree/bindings/mfd/st,stpmic1.example.dts:19.15-79.11: Warning (unit_address_vs_reg): /example-0/i2c@0: node has a unit name, but no reg or ranges property Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.example.dts:28.23-31.15: Warning (unit_address_vs_reg): /example-0/mdio@37000000/switch@10: node has a unit name, but no reg or ranges property Documentation/devicetree/bindings/rng/brcm,bcm2835.example.dts:17.5-21.11: Warning (unit_address_vs_reg): /example-0/rng: node has a reg or ranges property, but no unit name Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.example.dts:20.20-43.11: Warning (unit_address_vs_reg): /example-0/soc@0: node has a unit name, but no reg or ranges property Documentation/devicetree/bindings/usb/ingenic,musb.example.dts:18.28-21.11: Warning (unit_address_vs_reg): /example-0/usb-phy@0: node has a unit name, but no reg or ranges property Cc: Maxime Ripard <mripard@kernel.org> Cc: Chen-Yu Tsai <wens@csie.org> Cc: "Nuno Sá" <nuno.sa@analog.com> Cc: Jean Delvare <jdelvare@suse.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Lee Jones <lee.jones@linaro.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: Mark Brown <broonie@kernel.org> Cc: linux-hwmon@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Cc: netdev@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-spi@vger.kernel.org Cc: linux-usb@vger.kernel.org Acked-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
89 lines
1.9 KiB
YAML
89 lines
1.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
|
|
|
%YAML 1.2
|
|
---
|
|
$id: "http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#"
|
|
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|
|
|
title: Qualcomm Quad Serial Peripheral Interface (QSPI)
|
|
|
|
maintainers:
|
|
- Mukesh Savaliya <msavaliy@codeaurora.org>
|
|
- Akash Asthana <akashast@codeaurora.org>
|
|
|
|
description:
|
|
The QSPI controller allows SPI protocol communication in single, dual, or quad
|
|
wire transmission modes for read/write access to slaves such as NOR flash.
|
|
|
|
allOf:
|
|
- $ref: /spi/spi-controller.yaml#
|
|
|
|
properties:
|
|
compatible:
|
|
items:
|
|
- const: qcom,sdm845-qspi
|
|
- const: qcom,qspi-v1
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
clock-names:
|
|
items:
|
|
- const: iface
|
|
- const: core
|
|
|
|
clocks:
|
|
items:
|
|
- description: AHB clock
|
|
- description: QSPI core clock
|
|
|
|
interconnects:
|
|
minItems: 1
|
|
maxItems: 2
|
|
|
|
interconnect-names:
|
|
items:
|
|
- const: qspi-config
|
|
- const: qspi-memory
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- interrupts
|
|
- clock-names
|
|
- clocks
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
|
|
soc: soc {
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
|
|
qspi: spi@88df000 {
|
|
compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
|
|
reg = <0 0x88df000 0 0x600>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
|
|
clock-names = "iface", "core";
|
|
clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
|
|
<&gcc GCC_QSPI_CORE_CLK>;
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <25000000>;
|
|
spi-tx-bus-width = <2>;
|
|
spi-rx-bus-width = <2>;
|
|
};
|
|
|
|
};
|
|
};
|
|
...
|