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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f88fc122cc
This is a complete rewrite of the driver whose main purpose is to support the new DT representation where the NAND controller node is now really visible in the DT and appears under the EBI bus. With this new representation, we can add other devices under the EBI bus without risking pinmuxing conflicts (the NAND controller is under the EBI bus logic and as such, share some of its pins with other devices connected on this bus). Even though the goal of this rework was not necessarily to add new features, the new driver has been designed with this in mind. With a clearer separation between the different blocks and different IP revisions, adding new functionalities should be easier (we already have plans to support SMC timing configuration so that we no longer have to rely on the configuration done by the bootloader/bootstrap). Also note that we no longer have a custom ->cmdfunc() implementation, which means we can now benefit from new features added in the core implementation for free (support for new NAND operations for example). The last thing that we gain with this rework is support for multi-chips and multi-dies chips, thanks to the clean NAND controller <-> NAND devices representation. During this transition we also dropped support for AVR32 SoCs which should soon disappear from mainline (removal of the AVR32 arch is planned for 4.12). This new driver has been tested on several platforms (at91sam9261, at91sam9g45, at91sam9x5, sama5d3 and sama5d4) to make sure it did not introduce regressions, and it's worth mentioning that old bindings are still supported (which partly explain the positive diffstat). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
1021 lines
25 KiB
C
1021 lines
25 KiB
C
/*
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* Copyright 2017 ATMEL
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* Copyright 2017 Free Electrons
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*
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* Author: Boris Brezillon <boris.brezillon@free-electrons.com>
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*
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* Derived from the atmel_nand.c driver which contained the following
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* copyrights:
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*
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* Copyright 2003 Rick Bronson
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*
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* Derived from drivers/mtd/nand/autcpu12.c
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* Copyright 2001 Thomas Gleixner (gleixner@autronix.de)
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*
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* Derived from drivers/mtd/spia.c
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* Copyright 2000 Steven J. Hill (sjhill@cotw.com)
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*
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* Add Hardware ECC support for AT91SAM9260 / AT91SAM9263
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* Richard Genoud (richard.genoud@gmail.com), Adeneo Copyright 2007
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*
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* Derived from Das U-Boot source code
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* (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
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* Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
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*
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* Add Programmable Multibit ECC support for various AT91 SoC
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* Copyright 2012 ATMEL, Hong Xu
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*
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* Add Nand Flash Controller support for SAMA5 SoC
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* Copyright 2013 ATMEL, Josh Wu (josh.wu@atmel.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* The PMECC is an hardware assisted BCH engine, which means part of the
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* ECC algorithm is left to the software. The hardware/software repartition
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* is explained in the "PMECC Controller Functional Description" chapter in
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* Atmel datasheets, and some of the functions in this file are directly
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* implementing the algorithms described in the "Software Implementation"
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* sub-section.
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*
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* TODO: it seems that the software BCH implementation in lib/bch.c is already
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* providing some of the logic we are implementing here. It would be smart
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* to expose the needed lib/bch.c helpers/functions and re-use them here.
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*/
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#include <linux/genalloc.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/mtd/nand.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "pmecc.h"
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/* Galois field dimension */
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#define PMECC_GF_DIMENSION_13 13
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#define PMECC_GF_DIMENSION_14 14
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/* Primitive Polynomial used by PMECC */
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#define PMECC_GF_13_PRIMITIVE_POLY 0x201b
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#define PMECC_GF_14_PRIMITIVE_POLY 0x4443
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#define PMECC_LOOKUP_TABLE_SIZE_512 0x2000
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#define PMECC_LOOKUP_TABLE_SIZE_1024 0x4000
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/* Time out value for reading PMECC status register */
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#define PMECC_MAX_TIMEOUT_MS 100
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/* PMECC Register Definitions */
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#define ATMEL_PMECC_CFG 0x0
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#define PMECC_CFG_BCH_STRENGTH(x) (x)
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#define PMECC_CFG_BCH_STRENGTH_MASK GENMASK(2, 0)
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#define PMECC_CFG_SECTOR512 (0 << 4)
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#define PMECC_CFG_SECTOR1024 (1 << 4)
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#define PMECC_CFG_NSECTORS(x) ((fls(x) - 1) << 8)
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#define PMECC_CFG_READ_OP (0 << 12)
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#define PMECC_CFG_WRITE_OP (1 << 12)
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#define PMECC_CFG_SPARE_ENABLE BIT(16)
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#define PMECC_CFG_AUTO_ENABLE BIT(20)
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#define ATMEL_PMECC_SAREA 0x4
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#define ATMEL_PMECC_SADDR 0x8
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#define ATMEL_PMECC_EADDR 0xc
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#define ATMEL_PMECC_CLK 0x10
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#define PMECC_CLK_133MHZ (2 << 0)
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#define ATMEL_PMECC_CTRL 0x14
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#define PMECC_CTRL_RST BIT(0)
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#define PMECC_CTRL_DATA BIT(1)
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#define PMECC_CTRL_USER BIT(2)
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#define PMECC_CTRL_ENABLE BIT(4)
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#define PMECC_CTRL_DISABLE BIT(5)
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#define ATMEL_PMECC_SR 0x18
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#define PMECC_SR_BUSY BIT(0)
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#define PMECC_SR_ENABLE BIT(4)
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#define ATMEL_PMECC_IER 0x1c
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#define ATMEL_PMECC_IDR 0x20
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#define ATMEL_PMECC_IMR 0x24
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#define ATMEL_PMECC_ISR 0x28
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#define PMECC_ERROR_INT BIT(0)
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#define ATMEL_PMECC_ECC(sector, n) \
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((((sector) + 1) * 0x40) + (n))
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#define ATMEL_PMECC_REM(sector, n) \
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((((sector) + 1) * 0x40) + ((n) * 4) + 0x200)
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/* PMERRLOC Register Definitions */
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#define ATMEL_PMERRLOC_ELCFG 0x0
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#define PMERRLOC_ELCFG_SECTOR_512 (0 << 0)
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#define PMERRLOC_ELCFG_SECTOR_1024 (1 << 0)
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#define PMERRLOC_ELCFG_NUM_ERRORS(n) ((n) << 16)
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#define ATMEL_PMERRLOC_ELPRIM 0x4
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#define ATMEL_PMERRLOC_ELEN 0x8
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#define ATMEL_PMERRLOC_ELDIS 0xc
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#define PMERRLOC_DISABLE BIT(0)
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#define ATMEL_PMERRLOC_ELSR 0x10
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#define PMERRLOC_ELSR_BUSY BIT(0)
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#define ATMEL_PMERRLOC_ELIER 0x14
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#define ATMEL_PMERRLOC_ELIDR 0x18
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#define ATMEL_PMERRLOC_ELIMR 0x1c
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#define ATMEL_PMERRLOC_ELISR 0x20
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#define PMERRLOC_ERR_NUM_MASK GENMASK(12, 8)
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#define PMERRLOC_CALC_DONE BIT(0)
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#define ATMEL_PMERRLOC_SIGMA(x) (((x) * 0x4) + 0x28)
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#define ATMEL_PMERRLOC_EL(offs, x) (((x) * 0x4) + (offs))
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struct atmel_pmecc_gf_tables {
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u16 *alpha_to;
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u16 *index_of;
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};
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struct atmel_pmecc_caps {
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const int *strengths;
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int nstrengths;
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int el_offset;
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bool correct_erased_chunks;
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};
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struct atmel_pmecc {
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struct device *dev;
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const struct atmel_pmecc_caps *caps;
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struct {
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void __iomem *base;
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void __iomem *errloc;
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} regs;
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struct mutex lock;
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};
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struct atmel_pmecc_user_conf_cache {
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u32 cfg;
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u32 sarea;
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u32 saddr;
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u32 eaddr;
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};
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struct atmel_pmecc_user {
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struct atmel_pmecc_user_conf_cache cache;
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struct atmel_pmecc *pmecc;
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const struct atmel_pmecc_gf_tables *gf_tables;
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int eccbytes;
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s16 *partial_syn;
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s16 *si;
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s16 *lmu;
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s16 *smu;
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s32 *mu;
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s32 *dmu;
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s32 *delta;
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u32 isr;
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};
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static DEFINE_MUTEX(pmecc_gf_tables_lock);
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static const struct atmel_pmecc_gf_tables *pmecc_gf_tables_512;
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static const struct atmel_pmecc_gf_tables *pmecc_gf_tables_1024;
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static inline int deg(unsigned int poly)
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{
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/* polynomial degree is the most-significant bit index */
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return fls(poly) - 1;
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}
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static int atmel_pmecc_build_gf_tables(int mm, unsigned int poly,
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struct atmel_pmecc_gf_tables *gf_tables)
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{
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unsigned int i, x = 1;
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const unsigned int k = BIT(deg(poly));
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unsigned int nn = BIT(mm) - 1;
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/* primitive polynomial must be of degree m */
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if (k != (1u << mm))
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return -EINVAL;
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for (i = 0; i < nn; i++) {
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gf_tables->alpha_to[i] = x;
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gf_tables->index_of[x] = i;
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if (i && (x == 1))
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/* polynomial is not primitive (a^i=1 with 0<i<2^m-1) */
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return -EINVAL;
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x <<= 1;
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if (x & k)
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x ^= poly;
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}
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gf_tables->alpha_to[nn] = 1;
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gf_tables->index_of[0] = 0;
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return 0;
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}
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static const struct atmel_pmecc_gf_tables *
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atmel_pmecc_create_gf_tables(const struct atmel_pmecc_user_req *req)
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{
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struct atmel_pmecc_gf_tables *gf_tables;
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unsigned int poly, degree, table_size;
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int ret;
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if (req->ecc.sectorsize == 512) {
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degree = PMECC_GF_DIMENSION_13;
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poly = PMECC_GF_13_PRIMITIVE_POLY;
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table_size = PMECC_LOOKUP_TABLE_SIZE_512;
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} else {
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degree = PMECC_GF_DIMENSION_14;
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poly = PMECC_GF_14_PRIMITIVE_POLY;
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table_size = PMECC_LOOKUP_TABLE_SIZE_1024;
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}
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gf_tables = kzalloc(sizeof(*gf_tables) +
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(2 * table_size * sizeof(u16)),
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GFP_KERNEL);
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if (!gf_tables)
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return ERR_PTR(-ENOMEM);
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gf_tables->alpha_to = (void *)(gf_tables + 1);
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gf_tables->index_of = gf_tables->alpha_to + table_size;
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ret = atmel_pmecc_build_gf_tables(degree, poly, gf_tables);
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if (ret) {
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kfree(gf_tables);
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return ERR_PTR(ret);
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}
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return gf_tables;
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}
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static const struct atmel_pmecc_gf_tables *
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atmel_pmecc_get_gf_tables(const struct atmel_pmecc_user_req *req)
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{
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const struct atmel_pmecc_gf_tables **gf_tables, *ret;
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mutex_lock(&pmecc_gf_tables_lock);
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if (req->ecc.sectorsize == 512)
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gf_tables = &pmecc_gf_tables_512;
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else
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gf_tables = &pmecc_gf_tables_1024;
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ret = *gf_tables;
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if (!ret) {
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ret = atmel_pmecc_create_gf_tables(req);
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if (!IS_ERR(ret))
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*gf_tables = ret;
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}
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mutex_unlock(&pmecc_gf_tables_lock);
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return ret;
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}
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static int atmel_pmecc_prepare_user_req(struct atmel_pmecc *pmecc,
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struct atmel_pmecc_user_req *req)
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{
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int i, max_eccbytes, eccbytes = 0, eccstrength = 0;
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if (req->pagesize <= 0 || req->oobsize <= 0 || req->ecc.bytes <= 0)
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return -EINVAL;
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if (req->ecc.ooboffset >= 0 &&
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req->ecc.ooboffset + req->ecc.bytes > req->oobsize)
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return -EINVAL;
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if (req->ecc.sectorsize == ATMEL_PMECC_SECTOR_SIZE_AUTO) {
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if (req->ecc.strength != ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH)
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return -EINVAL;
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if (req->pagesize > 512)
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req->ecc.sectorsize = 1024;
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else
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req->ecc.sectorsize = 512;
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}
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if (req->ecc.sectorsize != 512 && req->ecc.sectorsize != 1024)
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return -EINVAL;
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if (req->pagesize % req->ecc.sectorsize)
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return -EINVAL;
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req->ecc.nsectors = req->pagesize / req->ecc.sectorsize;
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max_eccbytes = req->ecc.bytes;
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for (i = 0; i < pmecc->caps->nstrengths; i++) {
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int nbytes, strength = pmecc->caps->strengths[i];
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if (req->ecc.strength != ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH &&
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strength < req->ecc.strength)
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continue;
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nbytes = DIV_ROUND_UP(strength * fls(8 * req->ecc.sectorsize),
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8);
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nbytes *= req->ecc.nsectors;
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if (nbytes > max_eccbytes)
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break;
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eccstrength = strength;
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eccbytes = nbytes;
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if (req->ecc.strength != ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH)
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break;
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}
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if (!eccstrength)
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return -EINVAL;
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req->ecc.bytes = eccbytes;
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req->ecc.strength = eccstrength;
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if (req->ecc.ooboffset < 0)
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req->ecc.ooboffset = req->oobsize - eccbytes;
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return 0;
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}
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struct atmel_pmecc_user *
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atmel_pmecc_create_user(struct atmel_pmecc *pmecc,
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struct atmel_pmecc_user_req *req)
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{
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struct atmel_pmecc_user *user;
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const struct atmel_pmecc_gf_tables *gf_tables;
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int strength, size, ret;
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ret = atmel_pmecc_prepare_user_req(pmecc, req);
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if (ret)
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return ERR_PTR(ret);
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size = sizeof(*user);
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size = ALIGN(size, sizeof(u16));
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/* Reserve space for partial_syn, si and smu */
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size += ((2 * req->ecc.strength) + 1) * sizeof(u16) *
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(2 + req->ecc.strength + 2);
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/* Reserve space for lmu. */
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size += (req->ecc.strength + 1) * sizeof(u16);
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/* Reserve space for mu, dmu and delta. */
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size = ALIGN(size, sizeof(s32));
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size += (req->ecc.strength + 1) * sizeof(s32);
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user = kzalloc(size, GFP_KERNEL);
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if (!user)
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return ERR_PTR(-ENOMEM);
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user->pmecc = pmecc;
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user->partial_syn = (s16 *)PTR_ALIGN(user + 1, sizeof(u16));
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user->si = user->partial_syn + ((2 * req->ecc.strength) + 1);
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user->lmu = user->si + ((2 * req->ecc.strength) + 1);
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user->smu = user->lmu + (req->ecc.strength + 1);
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user->mu = (s32 *)PTR_ALIGN(user->smu +
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(((2 * req->ecc.strength) + 1) *
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(req->ecc.strength + 2)),
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sizeof(s32));
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user->dmu = user->mu + req->ecc.strength + 1;
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user->delta = user->dmu + req->ecc.strength + 1;
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gf_tables = atmel_pmecc_get_gf_tables(req);
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if (IS_ERR(gf_tables)) {
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kfree(user);
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return ERR_CAST(gf_tables);
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}
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user->gf_tables = gf_tables;
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user->eccbytes = req->ecc.bytes / req->ecc.nsectors;
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for (strength = 0; strength < pmecc->caps->nstrengths; strength++) {
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if (pmecc->caps->strengths[strength] == req->ecc.strength)
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break;
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}
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user->cache.cfg = PMECC_CFG_BCH_STRENGTH(strength) |
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PMECC_CFG_NSECTORS(req->ecc.nsectors);
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if (req->ecc.sectorsize == 1024)
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user->cache.cfg |= PMECC_CFG_SECTOR1024;
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user->cache.sarea = req->oobsize - 1;
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user->cache.saddr = req->ecc.ooboffset;
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user->cache.eaddr = req->ecc.ooboffset + req->ecc.bytes - 1;
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return user;
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}
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EXPORT_SYMBOL_GPL(atmel_pmecc_create_user);
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void atmel_pmecc_destroy_user(struct atmel_pmecc_user *user)
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{
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kfree(user);
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}
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EXPORT_SYMBOL_GPL(atmel_pmecc_destroy_user);
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static int get_strength(struct atmel_pmecc_user *user)
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{
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const int *strengths = user->pmecc->caps->strengths;
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return strengths[user->cache.cfg & PMECC_CFG_BCH_STRENGTH_MASK];
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}
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static int get_sectorsize(struct atmel_pmecc_user *user)
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{
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return user->cache.cfg & PMECC_LOOKUP_TABLE_SIZE_1024 ? 1024 : 512;
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}
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static void atmel_pmecc_gen_syndrome(struct atmel_pmecc_user *user, int sector)
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{
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int strength = get_strength(user);
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u32 value;
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int i;
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/* Fill odd syndromes */
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for (i = 0; i < strength; i++) {
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value = readl_relaxed(user->pmecc->regs.base +
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ATMEL_PMECC_REM(sector, i / 2));
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if (i & 1)
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value >>= 16;
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user->partial_syn[(2 * i) + 1] = value;
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}
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}
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static void atmel_pmecc_substitute(struct atmel_pmecc_user *user)
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{
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int degree = get_sectorsize(user) == 512 ? 13 : 14;
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int cw_len = BIT(degree) - 1;
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int strength = get_strength(user);
|
|
s16 *alpha_to = user->gf_tables->alpha_to;
|
|
s16 *index_of = user->gf_tables->index_of;
|
|
s16 *partial_syn = user->partial_syn;
|
|
s16 *si;
|
|
int i, j;
|
|
|
|
/*
|
|
* si[] is a table that holds the current syndrome value,
|
|
* an element of that table belongs to the field
|
|
*/
|
|
si = user->si;
|
|
|
|
memset(&si[1], 0, sizeof(s16) * ((2 * strength) - 1));
|
|
|
|
/* Computation 2t syndromes based on S(x) */
|
|
/* Odd syndromes */
|
|
for (i = 1; i < 2 * strength; i += 2) {
|
|
for (j = 0; j < degree; j++) {
|
|
if (partial_syn[i] & BIT(j))
|
|
si[i] = alpha_to[i * j] ^ si[i];
|
|
}
|
|
}
|
|
/* Even syndrome = (Odd syndrome) ** 2 */
|
|
for (i = 2, j = 1; j <= strength; i = ++j << 1) {
|
|
if (si[j] == 0) {
|
|
si[i] = 0;
|
|
} else {
|
|
s16 tmp;
|
|
|
|
tmp = index_of[si[j]];
|
|
tmp = (tmp * 2) % cw_len;
|
|
si[i] = alpha_to[tmp];
|
|
}
|
|
}
|
|
}
|
|
|
|
static void atmel_pmecc_get_sigma(struct atmel_pmecc_user *user)
|
|
{
|
|
s16 *lmu = user->lmu;
|
|
s16 *si = user->si;
|
|
s32 *mu = user->mu;
|
|
s32 *dmu = user->dmu;
|
|
s32 *delta = user->delta;
|
|
int degree = get_sectorsize(user) == 512 ? 13 : 14;
|
|
int cw_len = BIT(degree) - 1;
|
|
int strength = get_strength(user);
|
|
int num = 2 * strength + 1;
|
|
s16 *index_of = user->gf_tables->index_of;
|
|
s16 *alpha_to = user->gf_tables->alpha_to;
|
|
int i, j, k;
|
|
u32 dmu_0_count, tmp;
|
|
s16 *smu = user->smu;
|
|
|
|
/* index of largest delta */
|
|
int ro;
|
|
int largest;
|
|
int diff;
|
|
|
|
dmu_0_count = 0;
|
|
|
|
/* First Row */
|
|
|
|
/* Mu */
|
|
mu[0] = -1;
|
|
|
|
memset(smu, 0, sizeof(s16) * num);
|
|
smu[0] = 1;
|
|
|
|
/* discrepancy set to 1 */
|
|
dmu[0] = 1;
|
|
/* polynom order set to 0 */
|
|
lmu[0] = 0;
|
|
delta[0] = (mu[0] * 2 - lmu[0]) >> 1;
|
|
|
|
/* Second Row */
|
|
|
|
/* Mu */
|
|
mu[1] = 0;
|
|
/* Sigma(x) set to 1 */
|
|
memset(&smu[num], 0, sizeof(s16) * num);
|
|
smu[num] = 1;
|
|
|
|
/* discrepancy set to S1 */
|
|
dmu[1] = si[1];
|
|
|
|
/* polynom order set to 0 */
|
|
lmu[1] = 0;
|
|
|
|
delta[1] = (mu[1] * 2 - lmu[1]) >> 1;
|
|
|
|
/* Init the Sigma(x) last row */
|
|
memset(&smu[(strength + 1) * num], 0, sizeof(s16) * num);
|
|
|
|
for (i = 1; i <= strength; i++) {
|
|
mu[i + 1] = i << 1;
|
|
/* Begin Computing Sigma (Mu+1) and L(mu) */
|
|
/* check if discrepancy is set to 0 */
|
|
if (dmu[i] == 0) {
|
|
dmu_0_count++;
|
|
|
|
tmp = ((strength - (lmu[i] >> 1) - 1) / 2);
|
|
if ((strength - (lmu[i] >> 1) - 1) & 0x1)
|
|
tmp += 2;
|
|
else
|
|
tmp += 1;
|
|
|
|
if (dmu_0_count == tmp) {
|
|
for (j = 0; j <= (lmu[i] >> 1) + 1; j++)
|
|
smu[(strength + 1) * num + j] =
|
|
smu[i * num + j];
|
|
|
|
lmu[strength + 1] = lmu[i];
|
|
return;
|
|
}
|
|
|
|
/* copy polynom */
|
|
for (j = 0; j <= lmu[i] >> 1; j++)
|
|
smu[(i + 1) * num + j] = smu[i * num + j];
|
|
|
|
/* copy previous polynom order to the next */
|
|
lmu[i + 1] = lmu[i];
|
|
} else {
|
|
ro = 0;
|
|
largest = -1;
|
|
/* find largest delta with dmu != 0 */
|
|
for (j = 0; j < i; j++) {
|
|
if ((dmu[j]) && (delta[j] > largest)) {
|
|
largest = delta[j];
|
|
ro = j;
|
|
}
|
|
}
|
|
|
|
/* compute difference */
|
|
diff = (mu[i] - mu[ro]);
|
|
|
|
/* Compute degree of the new smu polynomial */
|
|
if ((lmu[i] >> 1) > ((lmu[ro] >> 1) + diff))
|
|
lmu[i + 1] = lmu[i];
|
|
else
|
|
lmu[i + 1] = ((lmu[ro] >> 1) + diff) * 2;
|
|
|
|
/* Init smu[i+1] with 0 */
|
|
for (k = 0; k < num; k++)
|
|
smu[(i + 1) * num + k] = 0;
|
|
|
|
/* Compute smu[i+1] */
|
|
for (k = 0; k <= lmu[ro] >> 1; k++) {
|
|
s16 a, b, c;
|
|
|
|
if (!(smu[ro * num + k] && dmu[i]))
|
|
continue;
|
|
|
|
a = index_of[dmu[i]];
|
|
b = index_of[dmu[ro]];
|
|
c = index_of[smu[ro * num + k]];
|
|
tmp = a + (cw_len - b) + c;
|
|
a = alpha_to[tmp % cw_len];
|
|
smu[(i + 1) * num + (k + diff)] = a;
|
|
}
|
|
|
|
for (k = 0; k <= lmu[i] >> 1; k++)
|
|
smu[(i + 1) * num + k] ^= smu[i * num + k];
|
|
}
|
|
|
|
/* End Computing Sigma (Mu+1) and L(mu) */
|
|
/* In either case compute delta */
|
|
delta[i + 1] = (mu[i + 1] * 2 - lmu[i + 1]) >> 1;
|
|
|
|
/* Do not compute discrepancy for the last iteration */
|
|
if (i >= strength)
|
|
continue;
|
|
|
|
for (k = 0; k <= (lmu[i + 1] >> 1); k++) {
|
|
tmp = 2 * (i - 1);
|
|
if (k == 0) {
|
|
dmu[i + 1] = si[tmp + 3];
|
|
} else if (smu[(i + 1) * num + k] && si[tmp + 3 - k]) {
|
|
s16 a, b, c;
|
|
|
|
a = index_of[smu[(i + 1) * num + k]];
|
|
b = si[2 * (i - 1) + 3 - k];
|
|
c = index_of[b];
|
|
tmp = a + c;
|
|
tmp %= cw_len;
|
|
dmu[i + 1] = alpha_to[tmp] ^ dmu[i + 1];
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
static int atmel_pmecc_err_location(struct atmel_pmecc_user *user)
|
|
{
|
|
int sector_size = get_sectorsize(user);
|
|
int degree = sector_size == 512 ? 13 : 14;
|
|
struct atmel_pmecc *pmecc = user->pmecc;
|
|
int strength = get_strength(user);
|
|
int ret, roots_nbr, i, err_nbr = 0;
|
|
int num = (2 * strength) + 1;
|
|
s16 *smu = user->smu;
|
|
u32 val;
|
|
|
|
writel(PMERRLOC_DISABLE, pmecc->regs.errloc + ATMEL_PMERRLOC_ELDIS);
|
|
|
|
for (i = 0; i <= user->lmu[strength + 1] >> 1; i++) {
|
|
writel_relaxed(smu[(strength + 1) * num + i],
|
|
pmecc->regs.errloc + ATMEL_PMERRLOC_SIGMA(i));
|
|
err_nbr++;
|
|
}
|
|
|
|
val = (err_nbr - 1) << 16;
|
|
if (sector_size == 1024)
|
|
val |= 1;
|
|
|
|
writel(val, pmecc->regs.errloc + ATMEL_PMERRLOC_ELCFG);
|
|
writel((sector_size * 8) + (degree * strength),
|
|
pmecc->regs.errloc + ATMEL_PMERRLOC_ELEN);
|
|
|
|
ret = readl_relaxed_poll_timeout(pmecc->regs.errloc +
|
|
ATMEL_PMERRLOC_ELISR,
|
|
val, val & PMERRLOC_CALC_DONE, 0,
|
|
PMECC_MAX_TIMEOUT_MS * 1000);
|
|
if (ret) {
|
|
dev_err(pmecc->dev,
|
|
"PMECC: Timeout to calculate error location.\n");
|
|
return ret;
|
|
}
|
|
|
|
roots_nbr = (val & PMERRLOC_ERR_NUM_MASK) >> 8;
|
|
/* Number of roots == degree of smu hence <= cap */
|
|
if (roots_nbr == user->lmu[strength + 1] >> 1)
|
|
return err_nbr - 1;
|
|
|
|
/*
|
|
* Number of roots does not match the degree of smu
|
|
* unable to correct error.
|
|
*/
|
|
return -EBADMSG;
|
|
}
|
|
|
|
int atmel_pmecc_correct_sector(struct atmel_pmecc_user *user, int sector,
|
|
void *data, void *ecc)
|
|
{
|
|
struct atmel_pmecc *pmecc = user->pmecc;
|
|
int sectorsize = get_sectorsize(user);
|
|
int eccbytes = user->eccbytes;
|
|
int i, nerrors;
|
|
|
|
if (!(user->isr & BIT(sector)))
|
|
return 0;
|
|
|
|
atmel_pmecc_gen_syndrome(user, sector);
|
|
atmel_pmecc_substitute(user);
|
|
atmel_pmecc_get_sigma(user);
|
|
|
|
nerrors = atmel_pmecc_err_location(user);
|
|
if (nerrors < 0)
|
|
return nerrors;
|
|
|
|
for (i = 0; i < nerrors; i++) {
|
|
const char *area;
|
|
int byte, bit;
|
|
u32 errpos;
|
|
u8 *ptr;
|
|
|
|
errpos = readl_relaxed(pmecc->regs.errloc +
|
|
ATMEL_PMERRLOC_EL(pmecc->caps->el_offset, i));
|
|
errpos--;
|
|
|
|
byte = errpos / 8;
|
|
bit = errpos % 8;
|
|
|
|
if (byte < sectorsize) {
|
|
ptr = data + byte;
|
|
area = "data";
|
|
} else if (byte < sectorsize + eccbytes) {
|
|
ptr = ecc + byte - sectorsize;
|
|
area = "ECC";
|
|
} else {
|
|
dev_dbg(pmecc->dev,
|
|
"Invalid errpos value (%d, max is %d)\n",
|
|
errpos, (sectorsize + eccbytes) * 8);
|
|
return -EINVAL;
|
|
}
|
|
|
|
dev_dbg(pmecc->dev,
|
|
"Bit flip in %s area, byte %d: 0x%02x -> 0x%02x\n",
|
|
area, byte, *ptr, (unsigned int)(*ptr ^ BIT(bit)));
|
|
|
|
*ptr ^= BIT(bit);
|
|
}
|
|
|
|
return nerrors;
|
|
}
|
|
EXPORT_SYMBOL_GPL(atmel_pmecc_correct_sector);
|
|
|
|
bool atmel_pmecc_correct_erased_chunks(struct atmel_pmecc_user *user)
|
|
{
|
|
return user->pmecc->caps->correct_erased_chunks;
|
|
}
|
|
EXPORT_SYMBOL_GPL(atmel_pmecc_correct_erased_chunks);
|
|
|
|
void atmel_pmecc_get_generated_eccbytes(struct atmel_pmecc_user *user,
|
|
int sector, void *ecc)
|
|
{
|
|
struct atmel_pmecc *pmecc = user->pmecc;
|
|
u8 *ptr = ecc;
|
|
int i;
|
|
|
|
for (i = 0; i < user->eccbytes; i++)
|
|
ptr[i] = readb_relaxed(pmecc->regs.base +
|
|
ATMEL_PMECC_ECC(sector, i));
|
|
}
|
|
EXPORT_SYMBOL_GPL(atmel_pmecc_get_generated_eccbytes);
|
|
|
|
int atmel_pmecc_enable(struct atmel_pmecc_user *user, int op)
|
|
{
|
|
struct atmel_pmecc *pmecc = user->pmecc;
|
|
u32 cfg;
|
|
|
|
if (op != NAND_ECC_READ && op != NAND_ECC_WRITE) {
|
|
dev_err(pmecc->dev, "Bad ECC operation!");
|
|
return -EINVAL;
|
|
}
|
|
|
|
mutex_lock(&user->pmecc->lock);
|
|
|
|
cfg = user->cache.cfg;
|
|
if (op == NAND_ECC_WRITE)
|
|
cfg |= PMECC_CFG_WRITE_OP;
|
|
else
|
|
cfg |= PMECC_CFG_AUTO_ENABLE;
|
|
|
|
writel(cfg, pmecc->regs.base + ATMEL_PMECC_CFG);
|
|
writel(user->cache.sarea, pmecc->regs.base + ATMEL_PMECC_SAREA);
|
|
writel(user->cache.saddr, pmecc->regs.base + ATMEL_PMECC_SADDR);
|
|
writel(user->cache.eaddr, pmecc->regs.base + ATMEL_PMECC_EADDR);
|
|
|
|
writel(PMECC_CTRL_ENABLE, pmecc->regs.base + ATMEL_PMECC_CTRL);
|
|
writel(PMECC_CTRL_DATA, pmecc->regs.base + ATMEL_PMECC_CTRL);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(atmel_pmecc_enable);
|
|
|
|
void atmel_pmecc_disable(struct atmel_pmecc_user *user)
|
|
{
|
|
struct atmel_pmecc *pmecc = user->pmecc;
|
|
|
|
writel(PMECC_CTRL_RST, pmecc->regs.base + ATMEL_PMECC_CTRL);
|
|
writel(PMECC_CTRL_DISABLE, pmecc->regs.base + ATMEL_PMECC_CTRL);
|
|
mutex_unlock(&user->pmecc->lock);
|
|
}
|
|
EXPORT_SYMBOL_GPL(atmel_pmecc_disable);
|
|
|
|
int atmel_pmecc_wait_rdy(struct atmel_pmecc_user *user)
|
|
{
|
|
struct atmel_pmecc *pmecc = user->pmecc;
|
|
u32 status;
|
|
int ret;
|
|
|
|
ret = readl_relaxed_poll_timeout(pmecc->regs.base +
|
|
ATMEL_PMECC_SR,
|
|
status, !(status & PMECC_SR_BUSY), 0,
|
|
PMECC_MAX_TIMEOUT_MS * 1000);
|
|
if (ret) {
|
|
dev_err(pmecc->dev,
|
|
"Timeout while waiting for PMECC ready.\n");
|
|
return ret;
|
|
}
|
|
|
|
user->isr = readl_relaxed(pmecc->regs.base + ATMEL_PMECC_ISR);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(atmel_pmecc_wait_rdy);
|
|
|
|
static struct atmel_pmecc *atmel_pmecc_create(struct platform_device *pdev,
|
|
const struct atmel_pmecc_caps *caps,
|
|
int pmecc_res_idx, int errloc_res_idx)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct atmel_pmecc *pmecc;
|
|
struct resource *res;
|
|
|
|
pmecc = devm_kzalloc(dev, sizeof(*pmecc), GFP_KERNEL);
|
|
if (!pmecc)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
pmecc->caps = caps;
|
|
pmecc->dev = dev;
|
|
mutex_init(&pmecc->lock);
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, pmecc_res_idx);
|
|
pmecc->regs.base = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(pmecc->regs.base))
|
|
return ERR_CAST(pmecc->regs.base);
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, errloc_res_idx);
|
|
pmecc->regs.errloc = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(pmecc->regs.errloc))
|
|
return ERR_CAST(pmecc->regs.errloc);
|
|
|
|
/* Disable all interrupts before registering the PMECC handler. */
|
|
writel(0xffffffff, pmecc->regs.base + ATMEL_PMECC_IDR);
|
|
|
|
/* Reset the ECC engine */
|
|
writel(PMECC_CTRL_RST, pmecc->regs.base + ATMEL_PMECC_CTRL);
|
|
writel(PMECC_CTRL_DISABLE, pmecc->regs.base + ATMEL_PMECC_CTRL);
|
|
|
|
return pmecc;
|
|
}
|
|
|
|
static void devm_atmel_pmecc_put(struct device *dev, void *res)
|
|
{
|
|
struct atmel_pmecc **pmecc = res;
|
|
|
|
put_device((*pmecc)->dev);
|
|
}
|
|
|
|
static struct atmel_pmecc *atmel_pmecc_get_by_node(struct device *userdev,
|
|
struct device_node *np)
|
|
{
|
|
struct platform_device *pdev;
|
|
struct atmel_pmecc *pmecc, **ptr;
|
|
|
|
pdev = of_find_device_by_node(np);
|
|
if (!pdev || !platform_get_drvdata(pdev))
|
|
return ERR_PTR(-EPROBE_DEFER);
|
|
|
|
ptr = devres_alloc(devm_atmel_pmecc_put, sizeof(*ptr), GFP_KERNEL);
|
|
if (!ptr)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
get_device(&pdev->dev);
|
|
pmecc = platform_get_drvdata(pdev);
|
|
|
|
*ptr = pmecc;
|
|
|
|
devres_add(userdev, ptr);
|
|
|
|
return pmecc;
|
|
}
|
|
|
|
static const int atmel_pmecc_strengths[] = { 2, 4, 8, 12, 24, 32 };
|
|
|
|
static struct atmel_pmecc_caps at91sam9g45_caps = {
|
|
.strengths = atmel_pmecc_strengths,
|
|
.nstrengths = 5,
|
|
.el_offset = 0x8c,
|
|
};
|
|
|
|
static struct atmel_pmecc_caps sama5d4_caps = {
|
|
.strengths = atmel_pmecc_strengths,
|
|
.nstrengths = 5,
|
|
.el_offset = 0x8c,
|
|
.correct_erased_chunks = true,
|
|
};
|
|
|
|
static struct atmel_pmecc_caps sama5d2_caps = {
|
|
.strengths = atmel_pmecc_strengths,
|
|
.nstrengths = 6,
|
|
.el_offset = 0xac,
|
|
.correct_erased_chunks = true,
|
|
};
|
|
|
|
static const struct of_device_id atmel_pmecc_legacy_match[] = {
|
|
{ .compatible = "atmel,sama5d4-nand", &sama5d4_caps },
|
|
{ .compatible = "atmel,sama5d2-nand", &sama5d2_caps },
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
struct atmel_pmecc *devm_atmel_pmecc_get(struct device *userdev)
|
|
{
|
|
struct atmel_pmecc *pmecc;
|
|
struct device_node *np;
|
|
|
|
if (!userdev)
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
if (!userdev->of_node)
|
|
return NULL;
|
|
|
|
np = of_parse_phandle(userdev->of_node, "ecc-engine", 0);
|
|
if (np) {
|
|
pmecc = atmel_pmecc_get_by_node(userdev, np);
|
|
of_node_put(np);
|
|
} else {
|
|
/*
|
|
* Support old DT bindings: in this case the PMECC iomem
|
|
* resources are directly defined in the user pdev at position
|
|
* 1 and 2. Extract all relevant information from there.
|
|
*/
|
|
struct platform_device *pdev = to_platform_device(userdev);
|
|
const struct atmel_pmecc_caps *caps;
|
|
|
|
/* No PMECC engine available. */
|
|
if (!of_property_read_bool(userdev->of_node,
|
|
"atmel,has-pmecc"))
|
|
return NULL;
|
|
|
|
caps = &at91sam9g45_caps;
|
|
|
|
/*
|
|
* Try to find the NFC subnode and extract the associated caps
|
|
* from there.
|
|
*/
|
|
np = of_find_compatible_node(userdev->of_node, NULL,
|
|
"atmel,sama5d3-nfc");
|
|
if (np) {
|
|
const struct of_device_id *match;
|
|
|
|
match = of_match_node(atmel_pmecc_legacy_match, np);
|
|
if (match && match->data)
|
|
caps = match->data;
|
|
|
|
of_node_put(np);
|
|
}
|
|
|
|
pmecc = atmel_pmecc_create(pdev, caps, 1, 2);
|
|
}
|
|
|
|
return pmecc;
|
|
}
|
|
EXPORT_SYMBOL(devm_atmel_pmecc_get);
|
|
|
|
static const struct of_device_id atmel_pmecc_match[] = {
|
|
{ .compatible = "atmel,at91sam9g45-pmecc", &at91sam9g45_caps },
|
|
{ .compatible = "atmel,sama5d4-pmecc", &sama5d4_caps },
|
|
{ .compatible = "atmel,sama5d2-pmecc", &sama5d2_caps },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, atmel_pmecc_match);
|
|
|
|
static int atmel_pmecc_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
const struct atmel_pmecc_caps *caps;
|
|
struct atmel_pmecc *pmecc;
|
|
|
|
caps = of_device_get_match_data(&pdev->dev);
|
|
if (!caps) {
|
|
dev_err(dev, "Invalid caps\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
pmecc = atmel_pmecc_create(pdev, caps, 0, 1);
|
|
if (IS_ERR(pmecc))
|
|
return PTR_ERR(pmecc);
|
|
|
|
platform_set_drvdata(pdev, pmecc);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver atmel_pmecc_driver = {
|
|
.driver = {
|
|
.name = "atmel-pmecc",
|
|
.of_match_table = of_match_ptr(atmel_pmecc_match),
|
|
},
|
|
.probe = atmel_pmecc_probe,
|
|
};
|
|
module_platform_driver(atmel_pmecc_driver);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
|
|
MODULE_DESCRIPTION("PMECC engine driver");
|
|
MODULE_ALIAS("platform:atmel_pmecc");
|