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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f160e99462
The AST2600 design separates the MDIO controllers from the MAC, which is where they were placed in the AST2400 and AST2500. Further, the register interface is reworked again, so now we have three possible different interface implementations, however this driver only supports the interface provided by the AST2600. The AST2400 and AST2500 will continue to be supported by the MDIO support embedded in the FTGMAC100 driver. The hardware supports both C22 and C45 mode, but for the moment only C22 support is implemented. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
158 lines
4.0 KiB
C
158 lines
4.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/* Copyright (C) 2019 IBM Corp. */
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/iopoll.h>
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#include <linux/mdio.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_mdio.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#define DRV_NAME "mdio-aspeed"
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#define ASPEED_MDIO_CTRL 0x0
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#define ASPEED_MDIO_CTRL_FIRE BIT(31)
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#define ASPEED_MDIO_CTRL_ST BIT(28)
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#define ASPEED_MDIO_CTRL_ST_C45 0
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#define ASPEED_MDIO_CTRL_ST_C22 1
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#define ASPEED_MDIO_CTRL_OP GENMASK(27, 26)
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#define MDIO_C22_OP_WRITE 0b01
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#define MDIO_C22_OP_READ 0b10
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#define ASPEED_MDIO_CTRL_PHYAD GENMASK(25, 21)
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#define ASPEED_MDIO_CTRL_REGAD GENMASK(20, 16)
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#define ASPEED_MDIO_CTRL_MIIWDATA GENMASK(15, 0)
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#define ASPEED_MDIO_DATA 0x4
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#define ASPEED_MDIO_DATA_MDC_THRES GENMASK(31, 24)
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#define ASPEED_MDIO_DATA_MDIO_EDGE BIT(23)
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#define ASPEED_MDIO_DATA_MDIO_LATCH GENMASK(22, 20)
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#define ASPEED_MDIO_DATA_IDLE BIT(16)
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#define ASPEED_MDIO_DATA_MIIRDATA GENMASK(15, 0)
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#define ASPEED_MDIO_INTERVAL_US 100
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#define ASPEED_MDIO_TIMEOUT_US (ASPEED_MDIO_INTERVAL_US * 10)
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struct aspeed_mdio {
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void __iomem *base;
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};
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static int aspeed_mdio_read(struct mii_bus *bus, int addr, int regnum)
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{
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struct aspeed_mdio *ctx = bus->priv;
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u32 ctrl;
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u32 data;
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int rc;
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dev_dbg(&bus->dev, "%s: addr: %d, regnum: %d\n", __func__, addr,
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regnum);
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/* Just clause 22 for the moment */
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if (regnum & MII_ADDR_C45)
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return -EOPNOTSUPP;
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ctrl = ASPEED_MDIO_CTRL_FIRE
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| FIELD_PREP(ASPEED_MDIO_CTRL_ST, ASPEED_MDIO_CTRL_ST_C22)
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| FIELD_PREP(ASPEED_MDIO_CTRL_OP, MDIO_C22_OP_READ)
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| FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, addr)
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| FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regnum);
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iowrite32(ctrl, ctx->base + ASPEED_MDIO_CTRL);
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rc = readl_poll_timeout(ctx->base + ASPEED_MDIO_DATA, data,
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data & ASPEED_MDIO_DATA_IDLE,
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ASPEED_MDIO_INTERVAL_US,
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ASPEED_MDIO_TIMEOUT_US);
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if (rc < 0)
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return rc;
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return FIELD_GET(ASPEED_MDIO_DATA_MIIRDATA, data);
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}
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static int aspeed_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
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{
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struct aspeed_mdio *ctx = bus->priv;
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u32 ctrl;
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dev_dbg(&bus->dev, "%s: addr: %d, regnum: %d, val: 0x%x\n",
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__func__, addr, regnum, val);
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/* Just clause 22 for the moment */
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if (regnum & MII_ADDR_C45)
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return -EOPNOTSUPP;
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ctrl = ASPEED_MDIO_CTRL_FIRE
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| FIELD_PREP(ASPEED_MDIO_CTRL_ST, ASPEED_MDIO_CTRL_ST_C22)
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| FIELD_PREP(ASPEED_MDIO_CTRL_OP, MDIO_C22_OP_WRITE)
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| FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, addr)
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| FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regnum)
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| FIELD_PREP(ASPEED_MDIO_CTRL_MIIWDATA, val);
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iowrite32(ctrl, ctx->base + ASPEED_MDIO_CTRL);
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return readl_poll_timeout(ctx->base + ASPEED_MDIO_CTRL, ctrl,
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!(ctrl & ASPEED_MDIO_CTRL_FIRE),
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ASPEED_MDIO_INTERVAL_US,
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ASPEED_MDIO_TIMEOUT_US);
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}
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static int aspeed_mdio_probe(struct platform_device *pdev)
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{
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struct aspeed_mdio *ctx;
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struct mii_bus *bus;
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int rc;
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bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*ctx));
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if (!bus)
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return -ENOMEM;
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ctx = bus->priv;
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ctx->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(ctx->base))
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return PTR_ERR(ctx->base);
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bus->name = DRV_NAME;
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snprintf(bus->id, MII_BUS_ID_SIZE, "%s%d", pdev->name, pdev->id);
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bus->parent = &pdev->dev;
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bus->read = aspeed_mdio_read;
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bus->write = aspeed_mdio_write;
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rc = of_mdiobus_register(bus, pdev->dev.of_node);
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if (rc) {
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dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
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return rc;
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}
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platform_set_drvdata(pdev, bus);
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return 0;
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}
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static int aspeed_mdio_remove(struct platform_device *pdev)
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{
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mdiobus_unregister(platform_get_drvdata(pdev));
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return 0;
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}
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static const struct of_device_id aspeed_mdio_of_match[] = {
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{ .compatible = "aspeed,ast2600-mdio", },
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{ },
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};
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static struct platform_driver aspeed_mdio_driver = {
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.driver = {
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.name = DRV_NAME,
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.of_match_table = aspeed_mdio_of_match,
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},
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.probe = aspeed_mdio_probe,
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.remove = aspeed_mdio_remove,
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};
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module_platform_driver(aspeed_mdio_driver);
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MODULE_AUTHOR("Andrew Jeffery <andrew@aj.id.au>");
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MODULE_LICENSE("GPL");
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