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f7f2b15c3d
We currently permit CPUs in the same system to deviate in the exact topology of the caches, and we subsequently hide this fact from user space by exposing a sanitised value of the cache type register CTR_EL0. However, guests running under KVM see the bare value of CTR_EL0, which could potentially result in issues with, e.g., JITs or other pieces of code that are sensitive to misreported cache line sizes. So let's start trapping cache ID instructions if there is a mismatch, and expose the sanitised version of CTR_EL0 to guests. Note that CTR_EL0 is treated as an invariant to KVM user space, so update that part as well. Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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| .. | ||
| hyp | ||
| debug.c | ||
| fpsimd.c | ||
| guest.c | ||
| handle_exit.c | ||
| hyp-init.S | ||
| hyp.S | ||
| inject_fault.c | ||
| irq.h | ||
| Kconfig | ||
| Makefile | ||
| regmap.c | ||
| reset.c | ||
| sys_regs_generic_v8.c | ||
| sys_regs.c | ||
| sys_regs.h | ||
| trace.h | ||
| va_layout.c | ||
| vgic-sys-reg-v3.c | ||