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This is mostly cut and paste from the imx35 pinctrl driver. The data was generated using sed and awk on arch/arm/plat-mxc/include/mach/iomux-mx25.h. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: devicetree@vger.kernel.org Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Russell King <linux@arm.linux.org.uk> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
24 lines
628 B
Plaintext
24 lines
628 B
Plaintext
* Freescale IMX25 IOMUX Controller
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Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
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and usage.
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CONFIG bits definition:
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PAD_CTL_HYS (1 << 8)
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PAD_CTL_PKE (1 << 7)
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PAD_CTL_PUE (1 << 6)
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PAD_CTL_PUS_100K_DOWN (0 << 4)
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PAD_CTL_PUS_47K_UP (1 << 4)
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PAD_CTL_PUS_100K_UP (2 << 4)
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PAD_CTL_PUS_22K_UP (3 << 4)
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PAD_CTL_ODE_CMOS (0 << 3)
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PAD_CTL_ODE_OPENDRAIN (1 << 3)
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PAD_CTL_DSE_NOMINAL (0 << 1)
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PAD_CTL_DSE_HIGH (1 << 1)
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PAD_CTL_DSE_MAX (2 << 1)
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PAD_CTL_SRE_FAST (1 << 0)
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PAD_CTL_SRE_SLOW (0 << 0)
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Refer to imx25-pinfunc.h in device tree source folder for all available
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imx25 PIN_FUNC_ID.
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