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3e9b3112ec
Common approach to accessing register fields is to define
structures or sets of macros containing mask and shift pair.
Operations on the register are then performed as follows:
field = (reg >> shift) & mask;
reg &= ~(mask << shift);
reg |= (field & mask) << shift;
Defining shift and mask separately is tedious. Ivo van Doorn
came up with an idea of computing them at compilation time
based on a single shifted mask (later refined by Felix) which
can be used like this:
#define REG_FIELD 0x000ff000
field = FIELD_GET(REG_FIELD, reg);
reg &= ~REG_FIELD;
reg |= FIELD_PREP(REG_FIELD, field);
FIELD_{GET,PREP} macros take care of finding out what the
appropriate shift is based on compilation time ffs operation.
GENMASK can be used to define registers (which is usually
less error-prone and easier to match with datasheets).
This approach is the most convenient I've seen so to limit code
multiplication let's move the macros to a global header file.
Attempts to use static inlines instead of macros failed due
to false positive triggering of BUILD_BUG_ON()s, especially with
GCC < 6.0.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Dinan Gunawardena <dinan.gunawardena@netronome.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
94 lines
2.8 KiB
C
94 lines
2.8 KiB
C
/*
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* Copyright (C) 2014 Felix Fietkau <nbd@nbd.name>
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* Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _LINUX_BITFIELD_H
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#define _LINUX_BITFIELD_H
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#include <linux/bug.h>
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/*
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* Bitfield access macros
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*
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* FIELD_{GET,PREP} macros take as first parameter shifted mask
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* from which they extract the base mask and shift amount.
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* Mask must be a compilation time constant.
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*
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* Example:
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*
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* #define REG_FIELD_A GENMASK(6, 0)
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* #define REG_FIELD_B BIT(7)
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* #define REG_FIELD_C GENMASK(15, 8)
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* #define REG_FIELD_D GENMASK(31, 16)
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*
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* Get:
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* a = FIELD_GET(REG_FIELD_A, reg);
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* b = FIELD_GET(REG_FIELD_B, reg);
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*
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* Set:
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* reg = FIELD_PREP(REG_FIELD_A, 1) |
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* FIELD_PREP(REG_FIELD_B, 0) |
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* FIELD_PREP(REG_FIELD_C, c) |
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* FIELD_PREP(REG_FIELD_D, 0x40);
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*
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* Modify:
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* reg &= ~REG_FIELD_C;
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* reg |= FIELD_PREP(REG_FIELD_C, c);
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*/
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#define __bf_shf(x) (__builtin_ffsll(x) - 1)
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#define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \
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({ \
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BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
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_pfx "mask is not constant"); \
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BUILD_BUG_ON_MSG(!(_mask), _pfx "mask is zero"); \
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BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
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~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \
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_pfx "value too large for the field"); \
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BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull, \
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_pfx "type of reg too small for mask"); \
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__BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \
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(1ULL << __bf_shf(_mask))); \
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})
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/**
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* FIELD_PREP() - prepare a bitfield element
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* @_mask: shifted mask defining the field's length and position
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* @_val: value to put in the field
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*
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* FIELD_PREP() masks and shifts up the value. The result should
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* be combined with other fields of the bitfield using logical OR.
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*/
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#define FIELD_PREP(_mask, _val) \
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({ \
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__BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
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((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \
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})
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/**
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* FIELD_GET() - extract a bitfield element
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* @_mask: shifted mask defining the field's length and position
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* @_reg: 32bit value of entire bitfield
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*
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* FIELD_GET() extracts the field specified by @_mask from the
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* bitfield passed in as @_reg by masking and shifting it down.
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*/
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#define FIELD_GET(_mask, _reg) \
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({ \
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__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
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(typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \
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})
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#endif
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