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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ff212f25fe
In all cases where it really matters we are using the read functions anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
188 lines
4.5 KiB
C
188 lines
4.5 KiB
C
/*
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* Copyright 2013 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* Authors: Christian König <christian.koenig@amd.com>
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*/
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#include <linux/firmware.h>
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#include <drm/drmP.h>
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#include "radeon.h"
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#include "radeon_asic.h"
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#include "sid.h"
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/**
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* vce_v1_0_get_rptr - get read pointer
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*
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* @rdev: radeon_device pointer
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* @ring: radeon_ring pointer
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*
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* Returns the current hardware read pointer
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*/
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uint32_t vce_v1_0_get_rptr(struct radeon_device *rdev,
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struct radeon_ring *ring)
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{
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if (ring->idx == TN_RING_TYPE_VCE1_INDEX)
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return RREG32(VCE_RB_RPTR);
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else
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return RREG32(VCE_RB_RPTR2);
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}
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/**
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* vce_v1_0_get_wptr - get write pointer
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*
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* @rdev: radeon_device pointer
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* @ring: radeon_ring pointer
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*
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* Returns the current hardware write pointer
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*/
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uint32_t vce_v1_0_get_wptr(struct radeon_device *rdev,
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struct radeon_ring *ring)
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{
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if (ring->idx == TN_RING_TYPE_VCE1_INDEX)
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return RREG32(VCE_RB_WPTR);
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else
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return RREG32(VCE_RB_WPTR2);
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}
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/**
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* vce_v1_0_set_wptr - set write pointer
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*
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* @rdev: radeon_device pointer
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* @ring: radeon_ring pointer
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*
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* Commits the write pointer to the hardware
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*/
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void vce_v1_0_set_wptr(struct radeon_device *rdev,
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struct radeon_ring *ring)
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{
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if (ring->idx == TN_RING_TYPE_VCE1_INDEX)
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WREG32(VCE_RB_WPTR, ring->wptr);
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else
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WREG32(VCE_RB_WPTR2, ring->wptr);
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}
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/**
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* vce_v1_0_start - start VCE block
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*
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* @rdev: radeon_device pointer
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*
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* Setup and start the VCE block
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*/
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int vce_v1_0_start(struct radeon_device *rdev)
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{
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struct radeon_ring *ring;
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int i, j, r;
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/* set BUSY flag */
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WREG32_P(VCE_STATUS, 1, ~1);
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ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX];
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WREG32(VCE_RB_RPTR, ring->wptr);
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WREG32(VCE_RB_WPTR, ring->wptr);
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WREG32(VCE_RB_BASE_LO, ring->gpu_addr);
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WREG32(VCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr));
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WREG32(VCE_RB_SIZE, ring->ring_size / 4);
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ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX];
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WREG32(VCE_RB_RPTR2, ring->wptr);
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WREG32(VCE_RB_WPTR2, ring->wptr);
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WREG32(VCE_RB_BASE_LO2, ring->gpu_addr);
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WREG32(VCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));
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WREG32(VCE_RB_SIZE2, ring->ring_size / 4);
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WREG32_P(VCE_VCPU_CNTL, VCE_CLK_EN, ~VCE_CLK_EN);
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WREG32_P(VCE_SOFT_RESET,
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VCE_ECPU_SOFT_RESET |
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VCE_FME_SOFT_RESET, ~(
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VCE_ECPU_SOFT_RESET |
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VCE_FME_SOFT_RESET));
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mdelay(100);
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WREG32_P(VCE_SOFT_RESET, 0, ~(
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VCE_ECPU_SOFT_RESET |
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VCE_FME_SOFT_RESET));
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for (i = 0; i < 10; ++i) {
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uint32_t status;
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for (j = 0; j < 100; ++j) {
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status = RREG32(VCE_STATUS);
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if (status & 2)
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break;
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mdelay(10);
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}
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r = 0;
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if (status & 2)
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break;
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DRM_ERROR("VCE not responding, trying to reset the ECPU!!!\n");
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WREG32_P(VCE_SOFT_RESET, VCE_ECPU_SOFT_RESET, ~VCE_ECPU_SOFT_RESET);
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mdelay(10);
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WREG32_P(VCE_SOFT_RESET, 0, ~VCE_ECPU_SOFT_RESET);
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mdelay(10);
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r = -1;
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}
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/* clear BUSY flag */
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WREG32_P(VCE_STATUS, 0, ~1);
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if (r) {
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DRM_ERROR("VCE not responding, giving up!!!\n");
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return r;
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}
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return 0;
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}
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int vce_v1_0_init(struct radeon_device *rdev)
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{
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struct radeon_ring *ring;
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int r;
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r = vce_v1_0_start(rdev);
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if (r)
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return r;
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ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX];
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ring->ready = true;
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r = radeon_ring_test(rdev, TN_RING_TYPE_VCE1_INDEX, ring);
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if (r) {
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ring->ready = false;
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return r;
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}
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ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX];
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ring->ready = true;
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r = radeon_ring_test(rdev, TN_RING_TYPE_VCE2_INDEX, ring);
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if (r) {
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ring->ready = false;
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return r;
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}
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DRM_INFO("VCE initialized successfully.\n");
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return 0;
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}
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