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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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50acfb2b76
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 97 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.025053186@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
69 lines
1.4 KiB
C
69 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2015 Regents of the University of California
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*/
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#ifndef _ASM_RISCV_ASM_H
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#define _ASM_RISCV_ASM_H
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#ifdef __ASSEMBLY__
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#define __ASM_STR(x) x
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#else
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#define __ASM_STR(x) #x
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#endif
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#if __riscv_xlen == 64
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#define __REG_SEL(a, b) __ASM_STR(a)
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#elif __riscv_xlen == 32
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#define __REG_SEL(a, b) __ASM_STR(b)
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#else
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#error "Unexpected __riscv_xlen"
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#endif
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#define REG_L __REG_SEL(ld, lw)
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#define REG_S __REG_SEL(sd, sw)
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#define SZREG __REG_SEL(8, 4)
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#define LGREG __REG_SEL(3, 2)
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#if __SIZEOF_POINTER__ == 8
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#ifdef __ASSEMBLY__
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#define RISCV_PTR .dword
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#define RISCV_SZPTR 8
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#define RISCV_LGPTR 3
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#else
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#define RISCV_PTR ".dword"
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#define RISCV_SZPTR "8"
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#define RISCV_LGPTR "3"
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#endif
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#elif __SIZEOF_POINTER__ == 4
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#ifdef __ASSEMBLY__
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#define RISCV_PTR .word
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#define RISCV_SZPTR 4
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#define RISCV_LGPTR 2
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#else
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#define RISCV_PTR ".word"
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#define RISCV_SZPTR "4"
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#define RISCV_LGPTR "2"
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#endif
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#else
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#error "Unexpected __SIZEOF_POINTER__"
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#endif
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#if (__SIZEOF_INT__ == 4)
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#define RISCV_INT __ASM_STR(.word)
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#define RISCV_SZINT __ASM_STR(4)
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#define RISCV_LGINT __ASM_STR(2)
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#else
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#error "Unexpected __SIZEOF_INT__"
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#endif
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#if (__SIZEOF_SHORT__ == 2)
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#define RISCV_SHORT __ASM_STR(.half)
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#define RISCV_SZSHORT __ASM_STR(2)
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#define RISCV_LGSHORT __ASM_STR(1)
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#else
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#error "Unexpected __SIZEOF_SHORT__"
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#endif
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#endif /* _ASM_RISCV_ASM_H */
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