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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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07f07f55a2
Add a static key which controls the invocation of the CPU buffer clear mechanism on idle entry. This is independent of other MDS mitigations because the idle entry invocation to mitigate the potential leakage due to store buffer repartitioning is only necessary on SMT systems. Add the actual invocations to the different halt/mwait variants which covers all usage sites. mwaitx is not patched as it's not available on Intel CPUs. The buffer clear is only invoked before entering the C-State to prevent that stale data from the idling CPU is spilled to the Hyper-Thread sibling after the Store buffer got repartitioned and all entries are available to the non idle sibling. When coming out of idle the store buffer is partitioned again so each sibling has half of it available. Now CPU which returned from idle could be speculatively exposed to contents of the sibling, but the buffers are flushed either on exit to user space or on VMENTER. When later on conditional buffer clearing is implemented on top of this, then there is no action required either because before returning to user space the context switch will set the condition flag which causes a flush on the return to user path. Note, that the buffer clearing on idle is only sensible on CPUs which are solely affected by MSBDS and not any other variant of MDS because the other MDS variants cannot be mitigated when SMT is enabled, so the buffer clearing on idle would be a window dressing exercise. This intentionally does not handle the case in the acpi/processor_idle driver which uses the legacy IO port interface for C-State transitions for two reasons: - The acpi/processor_idle driver was replaced by the intel_idle driver almost a decade ago. Anything Nehalem upwards supports it and defaults to that new driver. - The legacy IO port interface is likely to be used on older and therefore unaffected CPUs or on systems which do not receive microcode updates anymore, so there is no point in adding that. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bp@suse.de> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Frederic Weisbecker <frederic@kernel.org> Reviewed-by: Jon Masters <jcm@redhat.com> Tested-by: Jon Masters <jcm@redhat.com>
210 lines
4.3 KiB
C
210 lines
4.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _X86_IRQFLAGS_H_
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#define _X86_IRQFLAGS_H_
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#include <asm/processor-flags.h>
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#ifndef __ASSEMBLY__
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#include <asm/nospec-branch.h>
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/* Provide __cpuidle; we can't safely include <linux/cpu.h> */
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#define __cpuidle __attribute__((__section__(".cpuidle.text")))
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/*
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* Interrupt control:
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*/
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/* Declaration required for gcc < 4.9 to prevent -Werror=missing-prototypes */
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extern inline unsigned long native_save_fl(void);
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extern inline unsigned long native_save_fl(void)
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{
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unsigned long flags;
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/*
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* "=rm" is safe here, because "pop" adjusts the stack before
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* it evaluates its effective address -- this is part of the
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* documented behavior of the "pop" instruction.
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*/
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asm volatile("# __raw_save_flags\n\t"
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"pushf ; pop %0"
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: "=rm" (flags)
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: /* no input */
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: "memory");
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return flags;
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}
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extern inline void native_restore_fl(unsigned long flags);
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extern inline void native_restore_fl(unsigned long flags)
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{
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asm volatile("push %0 ; popf"
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: /* no output */
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:"g" (flags)
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:"memory", "cc");
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}
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static inline void native_irq_disable(void)
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{
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asm volatile("cli": : :"memory");
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}
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static inline void native_irq_enable(void)
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{
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asm volatile("sti": : :"memory");
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}
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static inline __cpuidle void native_safe_halt(void)
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{
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mds_idle_clear_cpu_buffers();
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asm volatile("sti; hlt": : :"memory");
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}
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static inline __cpuidle void native_halt(void)
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{
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mds_idle_clear_cpu_buffers();
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asm volatile("hlt": : :"memory");
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}
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#endif
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#ifdef CONFIG_PARAVIRT_XXL
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#include <asm/paravirt.h>
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#else
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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static inline notrace unsigned long arch_local_save_flags(void)
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{
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return native_save_fl();
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}
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static inline notrace void arch_local_irq_restore(unsigned long flags)
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{
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native_restore_fl(flags);
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}
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static inline notrace void arch_local_irq_disable(void)
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{
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native_irq_disable();
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}
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static inline notrace void arch_local_irq_enable(void)
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{
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native_irq_enable();
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}
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/*
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* Used in the idle loop; sti takes one instruction cycle
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* to complete:
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*/
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static inline __cpuidle void arch_safe_halt(void)
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{
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native_safe_halt();
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}
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/*
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* Used when interrupts are already enabled or to
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* shutdown the processor:
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*/
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static inline __cpuidle void halt(void)
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{
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native_halt();
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}
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/*
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* For spinlocks, etc:
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*/
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static inline notrace unsigned long arch_local_irq_save(void)
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{
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unsigned long flags = arch_local_save_flags();
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arch_local_irq_disable();
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return flags;
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}
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#else
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#define ENABLE_INTERRUPTS(x) sti
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#define DISABLE_INTERRUPTS(x) cli
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_DEBUG_ENTRY
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#define SAVE_FLAGS(x) pushfq; popq %rax
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#endif
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#define SWAPGS swapgs
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/*
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* Currently paravirt can't handle swapgs nicely when we
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* don't have a stack we can rely on (such as a user space
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* stack). So we either find a way around these or just fault
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* and emulate if a guest tries to call swapgs directly.
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*
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* Either way, this is a good way to document that we don't
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* have a reliable stack. x86_64 only.
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*/
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#define SWAPGS_UNSAFE_STACK swapgs
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#define INTERRUPT_RETURN jmp native_iret
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#define USERGS_SYSRET64 \
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swapgs; \
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sysretq;
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#define USERGS_SYSRET32 \
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swapgs; \
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sysretl
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#else
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#define INTERRUPT_RETURN iret
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_PARAVIRT_XXL */
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#ifndef __ASSEMBLY__
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static inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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return !(flags & X86_EFLAGS_IF);
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}
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static inline int arch_irqs_disabled(void)
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{
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unsigned long flags = arch_local_save_flags();
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return arch_irqs_disabled_flags(flags);
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}
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#endif /* !__ASSEMBLY__ */
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#ifdef __ASSEMBLY__
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#ifdef CONFIG_TRACE_IRQFLAGS
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# define TRACE_IRQS_ON call trace_hardirqs_on_thunk;
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# define TRACE_IRQS_OFF call trace_hardirqs_off_thunk;
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#else
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# define TRACE_IRQS_ON
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# define TRACE_IRQS_OFF
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#endif
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#ifdef CONFIG_DEBUG_LOCK_ALLOC
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# ifdef CONFIG_X86_64
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# define LOCKDEP_SYS_EXIT call lockdep_sys_exit_thunk
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# define LOCKDEP_SYS_EXIT_IRQ \
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TRACE_IRQS_ON; \
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sti; \
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call lockdep_sys_exit_thunk; \
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cli; \
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TRACE_IRQS_OFF;
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# else
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# define LOCKDEP_SYS_EXIT \
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pushl %eax; \
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pushl %ecx; \
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pushl %edx; \
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call lockdep_sys_exit; \
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popl %edx; \
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popl %ecx; \
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popl %eax;
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# define LOCKDEP_SYS_EXIT_IRQ
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# endif
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#else
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# define LOCKDEP_SYS_EXIT
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# define LOCKDEP_SYS_EXIT_IRQ
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#endif
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#endif /* __ASSEMBLY__ */
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#endif
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