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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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78c37d191d
This patch adds crc32 algorithms to shash crypto api. One is wrapper to gerneric crc32_le function. Second is crc32 pclmulqdq implementation. It use hardware provided PCLMULQDQ instruction to accelerate the CRC32 disposal. This instruction present from Intel Westmere and AMD Bulldozer CPUs. For intel core i5 I got 450MB/s for table implementation and 2100MB/s for pclmulqdq implementation. Signed-off-by: Alexander Boyko <alexander_boyko@xyratex.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
202 lines
5.0 KiB
C
202 lines
5.0 KiB
C
/* GPL HEADER START
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*
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 only,
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License version 2 for more details (a copy is included
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* in the LICENSE file that accompanied this code).
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*
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* You should have received a copy of the GNU General Public License
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* version 2 along with this program; If not, see http://www.gnu.org/licenses
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*
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* Please visit http://www.xyratex.com/contact if you need additional
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* information or have any questions.
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*
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* GPL HEADER END
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*/
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/*
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* Copyright 2012 Xyratex Technology Limited
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*
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* Wrappers for kernel crypto shash api to pclmulqdq crc32 imlementation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/crc32.h>
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#include <crypto/internal/hash.h>
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#include <asm/cpufeature.h>
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#include <asm/cpu_device_id.h>
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#include <asm/i387.h>
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#define CHKSUM_BLOCK_SIZE 1
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#define CHKSUM_DIGEST_SIZE 4
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#define PCLMUL_MIN_LEN 64L /* minimum size of buffer
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* for crc32_pclmul_le_16 */
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#define SCALE_F 16L /* size of xmm register */
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#define SCALE_F_MASK (SCALE_F - 1)
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u32 crc32_pclmul_le_16(unsigned char const *buffer, size_t len, u32 crc32);
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static u32 __attribute__((pure))
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crc32_pclmul_le(u32 crc, unsigned char const *p, size_t len)
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{
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unsigned int iquotient;
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unsigned int iremainder;
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unsigned int prealign;
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if (len < PCLMUL_MIN_LEN + SCALE_F_MASK || !irq_fpu_usable())
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return crc32_le(crc, p, len);
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if ((long)p & SCALE_F_MASK) {
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/* align p to 16 byte */
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prealign = SCALE_F - ((long)p & SCALE_F_MASK);
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crc = crc32_le(crc, p, prealign);
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len -= prealign;
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p = (unsigned char *)(((unsigned long)p + SCALE_F_MASK) &
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~SCALE_F_MASK);
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}
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iquotient = len & (~SCALE_F_MASK);
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iremainder = len & SCALE_F_MASK;
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kernel_fpu_begin();
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crc = crc32_pclmul_le_16(p, iquotient, crc);
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kernel_fpu_end();
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if (iremainder)
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crc = crc32_le(crc, p + iquotient, iremainder);
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return crc;
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}
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static int crc32_pclmul_cra_init(struct crypto_tfm *tfm)
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{
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u32 *key = crypto_tfm_ctx(tfm);
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*key = 0;
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return 0;
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}
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static int crc32_pclmul_setkey(struct crypto_shash *hash, const u8 *key,
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unsigned int keylen)
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{
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u32 *mctx = crypto_shash_ctx(hash);
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if (keylen != sizeof(u32)) {
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crypto_shash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
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return -EINVAL;
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}
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*mctx = le32_to_cpup((__le32 *)key);
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return 0;
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}
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static int crc32_pclmul_init(struct shash_desc *desc)
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{
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u32 *mctx = crypto_shash_ctx(desc->tfm);
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u32 *crcp = shash_desc_ctx(desc);
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*crcp = *mctx;
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return 0;
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}
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static int crc32_pclmul_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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u32 *crcp = shash_desc_ctx(desc);
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*crcp = crc32_pclmul_le(*crcp, data, len);
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return 0;
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}
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/* No final XOR 0xFFFFFFFF, like crc32_le */
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static int __crc32_pclmul_finup(u32 *crcp, const u8 *data, unsigned int len,
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u8 *out)
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{
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*(__le32 *)out = cpu_to_le32(crc32_pclmul_le(*crcp, data, len));
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return 0;
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}
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static int crc32_pclmul_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return __crc32_pclmul_finup(shash_desc_ctx(desc), data, len, out);
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}
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static int crc32_pclmul_final(struct shash_desc *desc, u8 *out)
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{
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u32 *crcp = shash_desc_ctx(desc);
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*(__le32 *)out = cpu_to_le32p(crcp);
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return 0;
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}
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static int crc32_pclmul_digest(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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return __crc32_pclmul_finup(crypto_shash_ctx(desc->tfm), data, len,
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out);
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}
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static struct shash_alg alg = {
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.setkey = crc32_pclmul_setkey,
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.init = crc32_pclmul_init,
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.update = crc32_pclmul_update,
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.final = crc32_pclmul_final,
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.finup = crc32_pclmul_finup,
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.digest = crc32_pclmul_digest,
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.descsize = sizeof(u32),
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.digestsize = CHKSUM_DIGEST_SIZE,
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.base = {
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.cra_name = "crc32",
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.cra_driver_name = "crc32-pclmul",
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.cra_priority = 200,
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.cra_blocksize = CHKSUM_BLOCK_SIZE,
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.cra_ctxsize = sizeof(u32),
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.cra_module = THIS_MODULE,
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.cra_init = crc32_pclmul_cra_init,
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}
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};
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static const struct x86_cpu_id crc32pclmul_cpu_id[] = {
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X86_FEATURE_MATCH(X86_FEATURE_PCLMULQDQ),
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, crc32pclmul_cpu_id);
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static int __init crc32_pclmul_mod_init(void)
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{
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if (!x86_match_cpu(crc32pclmul_cpu_id)) {
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pr_info("PCLMULQDQ-NI instructions are not detected.\n");
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return -ENODEV;
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}
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return crypto_register_shash(&alg);
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}
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static void __exit crc32_pclmul_mod_fini(void)
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{
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crypto_unregister_shash(&alg);
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}
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module_init(crc32_pclmul_mod_init);
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module_exit(crc32_pclmul_mod_fini);
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MODULE_AUTHOR("Alexander Boyko <alexander_boyko@xyratex.com>");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("crc32");
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MODULE_ALIAS("crc32-pclmul");
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