Evan Quan f6b4b4a1db drm/amd/powerplay: correct the APIs' naming ... 'UVD' is a HW engine name for Vega20 and before ASICs. For newer ASICs, the similar engine is named as 'VCN'. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-07-01 01:59:18 -04:00
..
hwmgr	drm/amdgpu: add apu flags (v2)	2020-05-22 13:41:53 -04:00
inc	drm/amd/powerplay: correct the APIs' naming	2020-07-01 01:59:18 -04:00
smumgr	drm/amdgpu: add apu flags (v2)	2020-05-22 13:41:53 -04:00
amd_powerplay.c	drm/amd/powerplay: perform PG ungate prior to CG ungate	2020-05-06 16:51:15 -04:00
amdgpu_smu.c	drm/amd/powerplay: correct the APIs' naming	2020-07-01 01:59:18 -04:00
arcturus_ppt.c	drm/amd/powerplay: correct the APIs' naming	2020-07-01 01:59:18 -04:00
arcturus_ppt.h	drm/amd/powerplay: update arcturus_ppt.c/h V3	2019-07-30 23:48:33 -05:00
Makefile	drm/amdgpu/powerplay: add initial swSMU support for sienna_cichlid (v2)	2020-06-03 13:52:05 -04:00
navi10_ppt.c	drm/amd/powerplay: correct the APIs' naming	2020-07-01 01:59:18 -04:00
navi10_ppt.h	drm/amdgpu/smu: custom pstate profiling clock frequence for navi series asics	2020-01-07 12:01:09 -05:00
renoir_ppt.c	drm/amd/powerplay: correct the APIs' naming	2020-07-01 01:59:18 -04:00
renoir_ppt.h	drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK	2020-04-03 17:20:15 -04:00
sienna_cichlid_ppt.c	drm/amd/powerplay: correct the APIs' naming	2020-07-01 01:59:18 -04:00
sienna_cichlid_ppt.h	drm/amd/powerplay: support to get power index for sienna_cichlid	2020-06-03 13:52:13 -04:00
smu_internal.h	drm/amd/powerplay: correct the APIs' naming	2020-07-01 01:59:18 -04:00
smu_v11_0.c	drm/amd/powerplay: forbid to use pr_err/warn/info/debug	2020-07-01 01:59:18 -04:00
smu_v12_0.c	drm/amd/powerplay: forbid to use pr_err/warn/info/debug	2020-07-01 01:59:18 -04:00