linux_dsm_epyc7002/arch/x86/kernel/cpu/mce
Sean Christopherson 32ad73db7f x86/msr-index: Clean up bit defines for IA32_FEATURE_CONTROL MSR
As pointed out by Boris, the defines for bits in IA32_FEATURE_CONTROL
are quite a mouthful, especially the VMX bits which must differentiate
between enabling VMX inside and outside SMX (TXT) operation.  Rename the
MSR and its bit defines to abbreviate FEATURE_CONTROL as FEAT_CTL to
make them a little friendlier on the eyes.

Arguably, the MSR itself should keep the full IA32_FEATURE_CONTROL name
to match Intel's SDM, but a future patch will add a dedicated Kconfig,
file and functions for the MSR. Using the full name for those assets is
rather unwieldy, so bite the bullet and use IA32_FEAT_CTL so that its
nomenclature is consistent throughout the kernel.

Opportunistically, fix a few other annoyances with the defines:

  - Relocate the bit defines so that they immediately follow the MSR
    define, e.g. aren't mistaken as belonging to MISC_FEATURE_CONTROL.
  - Add whitespace around the block of feature control defines to make
    it clear they're all related.
  - Use BIT() instead of manually encoding the bit shift.
  - Use "VMX" instead of "VMXON" to match the SDM.
  - Append "_ENABLED" to the LMCE (Local Machine Check Exception) bit to
    be consistent with the kernel's verbiage used for all other feature
    control bits.  Note, the SDM refers to the LMCE bit as LMCE_ON,
    likely to differentiate it from IA32_MCG_EXT_CTL.LMCE_EN.  Ignore
    the (literal) one-off usage of _ON, the SDM is simply "wrong".

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20191221044513.21680-2-sean.j.christopherson@intel.com
2020-01-13 17:23:08 +01:00
..
amd.c x86/mce/amd: Make disable_err_thresholding() static 2019-10-01 11:42:59 +02:00
apei.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 333 2019-06-05 17:37:06 +02:00
core.c x86/mce: Add Zhaoxin LMCE support 2019-10-01 12:33:33 +02:00
dev-mcelog.c treewide: Add SPDX license identifier for missed files 2019-05-21 10:50:45 +02:00
genpool.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 437 2019-06-05 17:37:17 +02:00
inject.c x86/mce: Do not check return value of debugfs_create functions 2019-06-14 16:04:21 +02:00
intel.c x86/msr-index: Clean up bit defines for IA32_FEATURE_CONTROL MSR 2020-01-13 17:23:08 +01:00
internal.h x86/mce: Add Zhaoxin LMCE support 2019-10-01 12:33:33 +02:00
Makefile
p5.c
severity.c x86/mce: Don't check for the overflow bit on action optional machine checks 2019-08-05 09:34:02 +02:00
therm_throt.c x86/mce/therm_throt: Mask out read-only and reserved MSR bits 2019-11-29 09:17:52 +01:00
threshold.c Merge branch 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2018-12-26 17:03:51 -08:00
winchip.c