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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d2eaf949d2
GTA04A5 has been produced with MCP chips either with 512MB RAM + 512MB NAND 512MB RAM + 1024MB NAND 1024MB RAM + 512MB OneNAND RAM setup is done by U-Boot (MLO/SPL) but OneNAND needs a different setup of the GPMC. So we need to derive a DTB variant that modifies the gpmc and nand setup. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
115 lines
3.2 KiB
Plaintext
115 lines
3.2 KiB
Plaintext
/*
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* Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "omap3-gta04a5.dts"
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&omap3_pmx_core {
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model = "Goldelico GTA04A5/Letux 2804 with OneNAND";
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gpmc_pins: pinmux_gpmc_pins {
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pinctrl-single,pins = <
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/* address lines */
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OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
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OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
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OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
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/* data lines, gpmc_d0..d7 not muxable according to TRM */
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OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
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OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
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OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
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OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
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OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
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OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
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OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
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OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
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/*
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* gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
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* according to TRM. OneNAND seems to require PIN_INPUT on clock.
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*/
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OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
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OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
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>;
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};
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};
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&gpmc {
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/* switch inherited setup to OneNAND */
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ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */
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pinctrl-names = "default";
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pinctrl-0 = <&gpmc_pins>;
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/delete-node/ nand@0,0;
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onenand@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ti,omap2-onenand";
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reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
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gpmc,sync-read;
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gpmc,sync-write;
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gpmc,burst-length = <16>;
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gpmc,burst-read;
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gpmc,burst-wrap;
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gpmc,burst-write;
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gpmc,device-width = <2>;
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gpmc,mux-add-data = <2>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <87>;
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gpmc,cs-wr-off-ns = <87>;
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gpmc,adv-on-ns = <0>;
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gpmc,adv-rd-off-ns = <10>;
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gpmc,adv-wr-off-ns = <10>;
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gpmc,oe-on-ns = <15>;
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gpmc,oe-off-ns = <87>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <87>;
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gpmc,rd-cycle-ns = <112>;
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gpmc,wr-cycle-ns = <112>;
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gpmc,access-ns = <81>;
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gpmc,page-burst-access-ns = <15>;
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,clk-activation-ns = <5>;
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gpmc,wr-data-mux-bus-ns = <30>;
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gpmc,wr-access-ns = <81>;
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gpmc,sync-clk-ps = <15000>;
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x-loader@0 {
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label = "X-Loader";
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reg = <0 0x80000>;
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};
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bootloaders@80000 {
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label = "U-Boot";
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reg = <0x80000 0x1c0000>;
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};
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bootloaders_env@240000 {
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label = "U-Boot Env";
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reg = <0x240000 0x40000>;
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};
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kernel@280000 {
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label = "Kernel";
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reg = <0x280000 0x600000>;
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};
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filesystem@880000 {
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label = "File System";
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reg = <0x880000 0>; /* 0 = MTDPART_SIZ_FULL */
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};
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};
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};
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