Jonathan Austin f5a5c89e36 ARM: 8604/1: V7M: Add support for reading the CTR with read_cpuid_cachetype() ... With the addition of caches to the V7M Architecture a new Cache Type Register (CTR) is defined at 0xE000ED7C. This register serves the same purpose as the V7A/R version and accessed via the read_cpuid_cachetype. Signed-off-by: Jonathan Austin <jonathan.austin@arm.com> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Tested-by: Andras Szemzo <sza@esh.hu> Tested-by: Joachim Eastwood <manabian@gmail.com> Tested-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2016-09-06 15:51:07 +01:00
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asm	ARM: 8604/1: V7M: Add support for reading the CTR with read_cpuid_cachetype()	2016-09-06 15:51:07 +01:00
debug	ARM: clps711x: Reduce static map size	2016-07-06 17:38:52 +02:00
uapi/asm	kvm arm/arm64: Remove trailing whitespace from headers	2016-07-12 15:20:36 -03:00