Zhi Wang f52c380a48 drm/i915/gvt: Refine shadow batch buffer ... 1) Use standard i915 GEM object sequence to access the shadow batch buffer. 2) Manage i915 vma life cycle to solve one FIXME. v2: - Refine code structure. - Refine the usage of GEM APIs. - Add the missing lock/unlock in release_shadow_batch_buffer. Test on my SKL NuC. Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>		2017-11-16 11:48:21 +08:00
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drm	drm/i915/gvt: Refine shadow batch buffer	2017-11-16 11:48:21 +08:00
host1x	gpu: host1x: Fix incorrect comment for channel_request	2017-10-20 14:19:52 +02:00
ipu-v3	gpu: ipu-v3: pre: implement workaround for ERR009624	2017-10-11 12:04:24 +02:00
vga	vgaarb: Factor out EFI and fallback default device selection	2017-10-18 10:04:56 +02:00
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