mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 07:35:12 +07:00
a51645f70f
There was NVMEM support added to of_get_mac_address, so it could now
return ERR_PTR encoded error values, so we need to adjust all current
users of of_get_mac_address to this new fact.
While at it, remove superfluous is_valid_ether_addr as the MAC address
returned from of_get_mac_address is always valid and checked by
is_valid_ether_addr anyway.
Fixes: d01f449c00
("of_net: add NVMEM support to of_get_mac_address")
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Signed-off-by: David S. Miller <davem@davemloft.net>
1040 lines
25 KiB
C
1040 lines
25 KiB
C
/*
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* Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
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* Copyright (c) 2014, I2SE GmbH
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*
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* Permission to use, copy, modify, and/or distribute this software
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* for any purpose with or without fee is hereby granted, provided
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* that the above copyright notice and this permission notice appear
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* in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
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* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
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* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/* This module implements the Qualcomm Atheros SPI protocol for
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* kernel-based SPI device; it is essentially an Ethernet-to-SPI
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* serial converter;
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*/
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#include <linux/errno.h>
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#include <linux/etherdevice.h>
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#include <linux/if_arp.h>
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#include <linux/if_ether.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/jiffies.h>
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#include <linux/kernel.h>
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#include <linux/kthread.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/netdevice.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_net.h>
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#include <linux/sched.h>
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#include <linux/skbuff.h>
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#include <linux/spi/spi.h>
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#include <linux/types.h>
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#include "qca_7k.h"
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#include "qca_7k_common.h"
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#include "qca_debug.h"
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#include "qca_spi.h"
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#define MAX_DMA_BURST_LEN 5000
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/* Modules parameters */
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#define QCASPI_CLK_SPEED_MIN 1000000
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#define QCASPI_CLK_SPEED_MAX 16000000
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#define QCASPI_CLK_SPEED 8000000
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static int qcaspi_clkspeed;
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module_param(qcaspi_clkspeed, int, 0);
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MODULE_PARM_DESC(qcaspi_clkspeed, "SPI bus clock speed (Hz). Use 1000000-16000000.");
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#define QCASPI_BURST_LEN_MIN 1
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#define QCASPI_BURST_LEN_MAX MAX_DMA_BURST_LEN
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static int qcaspi_burst_len = MAX_DMA_BURST_LEN;
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module_param(qcaspi_burst_len, int, 0);
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MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000.");
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#define QCASPI_PLUGGABLE_MIN 0
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#define QCASPI_PLUGGABLE_MAX 1
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static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN;
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module_param(qcaspi_pluggable, int, 0);
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MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no).");
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#define QCASPI_WRITE_VERIFY_MIN 0
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#define QCASPI_WRITE_VERIFY_MAX 3
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static int wr_verify = QCASPI_WRITE_VERIFY_MIN;
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module_param(wr_verify, int, 0);
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MODULE_PARM_DESC(wr_verify, "SPI register write verify trails. Use 0-3.");
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#define QCASPI_TX_TIMEOUT (1 * HZ)
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#define QCASPI_QCA7K_REBOOT_TIME_MS 1000
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static void
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start_spi_intr_handling(struct qcaspi *qca, u16 *intr_cause)
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{
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*intr_cause = 0;
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qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify);
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qcaspi_read_register(qca, SPI_REG_INTR_CAUSE, intr_cause);
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netdev_dbg(qca->net_dev, "interrupts: 0x%04x\n", *intr_cause);
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}
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static void
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end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause)
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{
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u16 intr_enable = (SPI_INT_CPU_ON |
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SPI_INT_PKT_AVLBL |
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SPI_INT_RDBUF_ERR |
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SPI_INT_WRBUF_ERR);
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qcaspi_write_register(qca, SPI_REG_INTR_CAUSE, intr_cause, 0);
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qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable, wr_verify);
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netdev_dbg(qca->net_dev, "acking int: 0x%04x\n", intr_cause);
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}
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static u32
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qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len)
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{
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__be16 cmd;
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struct spi_message msg;
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struct spi_transfer transfer[2];
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int ret;
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memset(&transfer, 0, sizeof(transfer));
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spi_message_init(&msg);
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cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL);
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transfer[0].tx_buf = &cmd;
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transfer[0].len = QCASPI_CMD_LEN;
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transfer[1].tx_buf = src;
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transfer[1].len = len;
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spi_message_add_tail(&transfer[0], &msg);
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spi_message_add_tail(&transfer[1], &msg);
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ret = spi_sync(qca->spi_dev, &msg);
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if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) {
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qcaspi_spi_error(qca);
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return 0;
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}
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return len;
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}
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static u32
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qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len)
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{
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struct spi_message msg;
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struct spi_transfer transfer;
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int ret;
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memset(&transfer, 0, sizeof(transfer));
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spi_message_init(&msg);
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transfer.tx_buf = src;
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transfer.len = len;
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spi_message_add_tail(&transfer, &msg);
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ret = spi_sync(qca->spi_dev, &msg);
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if (ret || (msg.actual_length != len)) {
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qcaspi_spi_error(qca);
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return 0;
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}
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return len;
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}
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static u32
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qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len)
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{
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struct spi_message msg;
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__be16 cmd;
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struct spi_transfer transfer[2];
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int ret;
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memset(&transfer, 0, sizeof(transfer));
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spi_message_init(&msg);
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cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL);
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transfer[0].tx_buf = &cmd;
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transfer[0].len = QCASPI_CMD_LEN;
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transfer[1].rx_buf = dst;
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transfer[1].len = len;
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spi_message_add_tail(&transfer[0], &msg);
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spi_message_add_tail(&transfer[1], &msg);
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ret = spi_sync(qca->spi_dev, &msg);
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if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) {
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qcaspi_spi_error(qca);
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return 0;
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}
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return len;
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}
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static u32
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qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len)
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{
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struct spi_message msg;
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struct spi_transfer transfer;
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int ret;
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memset(&transfer, 0, sizeof(transfer));
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spi_message_init(&msg);
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transfer.rx_buf = dst;
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transfer.len = len;
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spi_message_add_tail(&transfer, &msg);
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ret = spi_sync(qca->spi_dev, &msg);
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if (ret || (msg.actual_length != len)) {
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qcaspi_spi_error(qca);
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return 0;
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}
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return len;
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}
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static int
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qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd)
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{
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__be16 tx_data;
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struct spi_message msg;
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struct spi_transfer transfer;
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int ret;
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memset(&transfer, 0, sizeof(transfer));
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spi_message_init(&msg);
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tx_data = cpu_to_be16(cmd);
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transfer.len = sizeof(cmd);
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transfer.tx_buf = &tx_data;
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spi_message_add_tail(&transfer, &msg);
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ret = spi_sync(qca->spi_dev, &msg);
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if (!ret)
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ret = msg.status;
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if (ret)
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qcaspi_spi_error(qca);
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return ret;
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}
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static int
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qcaspi_tx_frame(struct qcaspi *qca, struct sk_buff *skb)
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{
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u32 count;
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u32 written;
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u32 offset;
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u32 len;
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len = skb->len;
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qcaspi_write_register(qca, SPI_REG_BFR_SIZE, len, wr_verify);
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if (qca->legacy_mode)
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qcaspi_tx_cmd(qca, QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL);
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offset = 0;
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while (len) {
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count = len;
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if (count > qca->burst_len)
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count = qca->burst_len;
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if (qca->legacy_mode) {
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written = qcaspi_write_legacy(qca,
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skb->data + offset,
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count);
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} else {
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written = qcaspi_write_burst(qca,
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skb->data + offset,
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count);
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}
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if (written != count)
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return -1;
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offset += count;
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len -= count;
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}
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return 0;
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}
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static int
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qcaspi_transmit(struct qcaspi *qca)
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{
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struct net_device_stats *n_stats = &qca->net_dev->stats;
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u16 available = 0;
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u32 pkt_len;
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u16 new_head;
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u16 packets = 0;
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if (qca->txr.skb[qca->txr.head] == NULL)
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return 0;
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qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA, &available);
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if (available > QCASPI_HW_BUF_LEN) {
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/* This could only happen by interferences on the SPI line.
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* So retry later ...
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*/
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qca->stats.buf_avail_err++;
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return -1;
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}
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while (qca->txr.skb[qca->txr.head]) {
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pkt_len = qca->txr.skb[qca->txr.head]->len + QCASPI_HW_PKT_LEN;
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if (available < pkt_len) {
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if (packets == 0)
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qca->stats.write_buf_miss++;
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break;
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}
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if (qcaspi_tx_frame(qca, qca->txr.skb[qca->txr.head]) == -1) {
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qca->stats.write_err++;
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return -1;
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}
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packets++;
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n_stats->tx_packets++;
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n_stats->tx_bytes += qca->txr.skb[qca->txr.head]->len;
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available -= pkt_len;
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/* remove the skb from the queue */
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/* XXX After inconsistent lock states netif_tx_lock()
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* has been replaced by netif_tx_lock_bh() and so on.
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*/
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netif_tx_lock_bh(qca->net_dev);
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dev_kfree_skb(qca->txr.skb[qca->txr.head]);
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qca->txr.skb[qca->txr.head] = NULL;
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qca->txr.size -= pkt_len;
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new_head = qca->txr.head + 1;
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if (new_head >= qca->txr.count)
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new_head = 0;
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qca->txr.head = new_head;
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if (netif_queue_stopped(qca->net_dev))
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netif_wake_queue(qca->net_dev);
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netif_tx_unlock_bh(qca->net_dev);
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}
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return 0;
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}
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static int
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qcaspi_receive(struct qcaspi *qca)
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{
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struct net_device *net_dev = qca->net_dev;
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struct net_device_stats *n_stats = &net_dev->stats;
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u16 available = 0;
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u32 bytes_read;
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u8 *cp;
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/* Allocate rx SKB if we don't have one available. */
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if (!qca->rx_skb) {
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qca->rx_skb = netdev_alloc_skb_ip_align(net_dev,
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net_dev->mtu +
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VLAN_ETH_HLEN);
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if (!qca->rx_skb) {
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netdev_dbg(net_dev, "out of RX resources\n");
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qca->stats.out_of_mem++;
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return -1;
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}
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}
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/* Read the packet size. */
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qcaspi_read_register(qca, SPI_REG_RDBUF_BYTE_AVA, &available);
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netdev_dbg(net_dev, "qcaspi_receive: SPI_REG_RDBUF_BYTE_AVA: Value: %08x\n",
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available);
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if (available > QCASPI_HW_BUF_LEN) {
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/* This could only happen by interferences on the SPI line.
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* So retry later ...
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*/
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qca->stats.buf_avail_err++;
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return -1;
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} else if (available == 0) {
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netdev_dbg(net_dev, "qcaspi_receive called without any data being available!\n");
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return -1;
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}
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qcaspi_write_register(qca, SPI_REG_BFR_SIZE, available, wr_verify);
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if (qca->legacy_mode)
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qcaspi_tx_cmd(qca, QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL);
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while (available) {
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u32 count = available;
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if (count > qca->burst_len)
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count = qca->burst_len;
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if (qca->legacy_mode) {
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bytes_read = qcaspi_read_legacy(qca, qca->rx_buffer,
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count);
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} else {
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bytes_read = qcaspi_read_burst(qca, qca->rx_buffer,
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count);
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}
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netdev_dbg(net_dev, "available: %d, byte read: %d\n",
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available, bytes_read);
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if (bytes_read) {
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available -= bytes_read;
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} else {
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qca->stats.read_err++;
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return -1;
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}
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cp = qca->rx_buffer;
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while ((bytes_read--) && (qca->rx_skb)) {
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s32 retcode;
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retcode = qcafrm_fsm_decode(&qca->frm_handle,
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qca->rx_skb->data,
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skb_tailroom(qca->rx_skb),
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*cp);
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cp++;
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switch (retcode) {
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case QCAFRM_GATHER:
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case QCAFRM_NOHEAD:
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break;
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case QCAFRM_NOTAIL:
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netdev_dbg(net_dev, "no RX tail\n");
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n_stats->rx_errors++;
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n_stats->rx_dropped++;
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break;
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case QCAFRM_INVLEN:
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netdev_dbg(net_dev, "invalid RX length\n");
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n_stats->rx_errors++;
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n_stats->rx_dropped++;
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break;
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default:
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qca->rx_skb->dev = qca->net_dev;
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n_stats->rx_packets++;
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n_stats->rx_bytes += retcode;
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skb_put(qca->rx_skb, retcode);
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qca->rx_skb->protocol = eth_type_trans(
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qca->rx_skb, qca->rx_skb->dev);
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qca->rx_skb->ip_summed = CHECKSUM_UNNECESSARY;
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netif_rx_ni(qca->rx_skb);
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qca->rx_skb = netdev_alloc_skb_ip_align(net_dev,
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net_dev->mtu + VLAN_ETH_HLEN);
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if (!qca->rx_skb) {
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netdev_dbg(net_dev, "out of RX resources\n");
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n_stats->rx_errors++;
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qca->stats.out_of_mem++;
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break;
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}
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}
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}
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}
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return 0;
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}
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|
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/* Check that tx ring stores only so much bytes
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* that fit into the internal QCA buffer.
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*/
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static int
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qcaspi_tx_ring_has_space(struct tx_ring *txr)
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{
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if (txr->skb[txr->tail])
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return 0;
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return (txr->size + QCAFRM_MAX_LEN < QCASPI_HW_BUF_LEN) ? 1 : 0;
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}
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/* Flush the tx ring. This function is only safe to
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* call from the qcaspi_spi_thread.
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*/
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static void
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qcaspi_flush_tx_ring(struct qcaspi *qca)
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{
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int i;
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/* XXX After inconsistent lock states netif_tx_lock()
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* has been replaced by netif_tx_lock_bh() and so on.
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*/
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netif_tx_lock_bh(qca->net_dev);
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for (i = 0; i < TX_RING_MAX_LEN; i++) {
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if (qca->txr.skb[i]) {
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dev_kfree_skb(qca->txr.skb[i]);
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qca->txr.skb[i] = NULL;
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qca->net_dev->stats.tx_dropped++;
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}
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}
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qca->txr.tail = 0;
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qca->txr.head = 0;
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qca->txr.size = 0;
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netif_tx_unlock_bh(qca->net_dev);
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}
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|
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static void
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qcaspi_qca7k_sync(struct qcaspi *qca, int event)
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{
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u16 signature = 0;
|
|
u16 spi_config;
|
|
u16 wrbuf_space = 0;
|
|
static u16 reset_count;
|
|
|
|
if (event == QCASPI_EVENT_CPUON) {
|
|
/* Read signature twice, if not valid
|
|
* go back to unknown state.
|
|
*/
|
|
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
|
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
|
if (signature != QCASPI_GOOD_SIGNATURE) {
|
|
qca->sync = QCASPI_SYNC_UNKNOWN;
|
|
netdev_dbg(qca->net_dev, "sync: got CPU on, but signature was invalid, restart\n");
|
|
} else {
|
|
/* ensure that the WRBUF is empty */
|
|
qcaspi_read_register(qca, SPI_REG_WRBUF_SPC_AVA,
|
|
&wrbuf_space);
|
|
if (wrbuf_space != QCASPI_HW_BUF_LEN) {
|
|
netdev_dbg(qca->net_dev, "sync: got CPU on, but wrbuf not empty. reset!\n");
|
|
qca->sync = QCASPI_SYNC_UNKNOWN;
|
|
} else {
|
|
netdev_dbg(qca->net_dev, "sync: got CPU on, now in sync\n");
|
|
qca->sync = QCASPI_SYNC_READY;
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
|
|
switch (qca->sync) {
|
|
case QCASPI_SYNC_READY:
|
|
/* Read signature, if not valid go to unknown state. */
|
|
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
|
if (signature != QCASPI_GOOD_SIGNATURE) {
|
|
qca->sync = QCASPI_SYNC_UNKNOWN;
|
|
netdev_dbg(qca->net_dev, "sync: bad signature, restart\n");
|
|
/* don't reset right away */
|
|
return;
|
|
}
|
|
break;
|
|
case QCASPI_SYNC_UNKNOWN:
|
|
/* Read signature, if not valid stay in unknown state */
|
|
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
|
if (signature != QCASPI_GOOD_SIGNATURE) {
|
|
netdev_dbg(qca->net_dev, "sync: could not read signature to reset device, retry.\n");
|
|
return;
|
|
}
|
|
|
|
/* TODO: use GPIO to reset QCA7000 in legacy mode*/
|
|
netdev_dbg(qca->net_dev, "sync: resetting device.\n");
|
|
qcaspi_read_register(qca, SPI_REG_SPI_CONFIG, &spi_config);
|
|
spi_config |= QCASPI_SLAVE_RESET_BIT;
|
|
qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, spi_config, 0);
|
|
|
|
qca->sync = QCASPI_SYNC_RESET;
|
|
qca->stats.trig_reset++;
|
|
reset_count = 0;
|
|
break;
|
|
case QCASPI_SYNC_RESET:
|
|
reset_count++;
|
|
netdev_dbg(qca->net_dev, "sync: waiting for CPU on, count %u.\n",
|
|
reset_count);
|
|
if (reset_count >= QCASPI_RESET_TIMEOUT) {
|
|
/* reset did not seem to take place, try again */
|
|
qca->sync = QCASPI_SYNC_UNKNOWN;
|
|
qca->stats.reset_timeout++;
|
|
netdev_dbg(qca->net_dev, "sync: reset timeout, restarting process.\n");
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
static int
|
|
qcaspi_spi_thread(void *data)
|
|
{
|
|
struct qcaspi *qca = data;
|
|
u16 intr_cause = 0;
|
|
|
|
netdev_info(qca->net_dev, "SPI thread created\n");
|
|
while (!kthread_should_stop()) {
|
|
set_current_state(TASK_INTERRUPTIBLE);
|
|
if ((qca->intr_req == qca->intr_svc) &&
|
|
(qca->txr.skb[qca->txr.head] == NULL) &&
|
|
(qca->sync == QCASPI_SYNC_READY))
|
|
schedule();
|
|
|
|
set_current_state(TASK_RUNNING);
|
|
|
|
netdev_dbg(qca->net_dev, "have work to do. int: %d, tx_skb: %p\n",
|
|
qca->intr_req - qca->intr_svc,
|
|
qca->txr.skb[qca->txr.head]);
|
|
|
|
qcaspi_qca7k_sync(qca, QCASPI_EVENT_UPDATE);
|
|
|
|
if (qca->sync != QCASPI_SYNC_READY) {
|
|
netdev_dbg(qca->net_dev, "sync: not ready %u, turn off carrier and flush\n",
|
|
(unsigned int)qca->sync);
|
|
netif_stop_queue(qca->net_dev);
|
|
netif_carrier_off(qca->net_dev);
|
|
qcaspi_flush_tx_ring(qca);
|
|
msleep(QCASPI_QCA7K_REBOOT_TIME_MS);
|
|
}
|
|
|
|
if (qca->intr_svc != qca->intr_req) {
|
|
qca->intr_svc = qca->intr_req;
|
|
start_spi_intr_handling(qca, &intr_cause);
|
|
|
|
if (intr_cause & SPI_INT_CPU_ON) {
|
|
qcaspi_qca7k_sync(qca, QCASPI_EVENT_CPUON);
|
|
|
|
/* not synced. */
|
|
if (qca->sync != QCASPI_SYNC_READY)
|
|
continue;
|
|
|
|
qca->stats.device_reset++;
|
|
netif_wake_queue(qca->net_dev);
|
|
netif_carrier_on(qca->net_dev);
|
|
}
|
|
|
|
if (intr_cause & SPI_INT_RDBUF_ERR) {
|
|
/* restart sync */
|
|
netdev_dbg(qca->net_dev, "===> rdbuf error!\n");
|
|
qca->stats.read_buf_err++;
|
|
qca->sync = QCASPI_SYNC_UNKNOWN;
|
|
continue;
|
|
}
|
|
|
|
if (intr_cause & SPI_INT_WRBUF_ERR) {
|
|
/* restart sync */
|
|
netdev_dbg(qca->net_dev, "===> wrbuf error!\n");
|
|
qca->stats.write_buf_err++;
|
|
qca->sync = QCASPI_SYNC_UNKNOWN;
|
|
continue;
|
|
}
|
|
|
|
/* can only handle other interrupts
|
|
* if sync has occurred
|
|
*/
|
|
if (qca->sync == QCASPI_SYNC_READY) {
|
|
if (intr_cause & SPI_INT_PKT_AVLBL)
|
|
qcaspi_receive(qca);
|
|
}
|
|
|
|
end_spi_intr_handling(qca, intr_cause);
|
|
}
|
|
|
|
if (qca->sync == QCASPI_SYNC_READY)
|
|
qcaspi_transmit(qca);
|
|
}
|
|
set_current_state(TASK_RUNNING);
|
|
netdev_info(qca->net_dev, "SPI thread exit\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static irqreturn_t
|
|
qcaspi_intr_handler(int irq, void *data)
|
|
{
|
|
struct qcaspi *qca = data;
|
|
|
|
qca->intr_req++;
|
|
if (qca->spi_thread &&
|
|
qca->spi_thread->state != TASK_RUNNING)
|
|
wake_up_process(qca->spi_thread);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int
|
|
qcaspi_netdev_open(struct net_device *dev)
|
|
{
|
|
struct qcaspi *qca = netdev_priv(dev);
|
|
int ret = 0;
|
|
|
|
if (!qca)
|
|
return -EINVAL;
|
|
|
|
qca->intr_req = 1;
|
|
qca->intr_svc = 0;
|
|
qca->sync = QCASPI_SYNC_UNKNOWN;
|
|
qcafrm_fsm_init_spi(&qca->frm_handle);
|
|
|
|
qca->spi_thread = kthread_run((void *)qcaspi_spi_thread,
|
|
qca, "%s", dev->name);
|
|
|
|
if (IS_ERR(qca->spi_thread)) {
|
|
netdev_err(dev, "%s: unable to start kernel thread.\n",
|
|
QCASPI_DRV_NAME);
|
|
return PTR_ERR(qca->spi_thread);
|
|
}
|
|
|
|
ret = request_irq(qca->spi_dev->irq, qcaspi_intr_handler, 0,
|
|
dev->name, qca);
|
|
if (ret) {
|
|
netdev_err(dev, "%s: unable to get IRQ %d (irqval=%d).\n",
|
|
QCASPI_DRV_NAME, qca->spi_dev->irq, ret);
|
|
kthread_stop(qca->spi_thread);
|
|
return ret;
|
|
}
|
|
|
|
/* SPI thread takes care of TX queue */
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
qcaspi_netdev_close(struct net_device *dev)
|
|
{
|
|
struct qcaspi *qca = netdev_priv(dev);
|
|
|
|
netif_stop_queue(dev);
|
|
|
|
qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, 0, wr_verify);
|
|
free_irq(qca->spi_dev->irq, qca);
|
|
|
|
kthread_stop(qca->spi_thread);
|
|
qca->spi_thread = NULL;
|
|
qcaspi_flush_tx_ring(qca);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static netdev_tx_t
|
|
qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev)
|
|
{
|
|
u32 frame_len;
|
|
u8 *ptmp;
|
|
struct qcaspi *qca = netdev_priv(dev);
|
|
u16 new_tail;
|
|
struct sk_buff *tskb;
|
|
u8 pad_len = 0;
|
|
|
|
if (skb->len < QCAFRM_MIN_LEN)
|
|
pad_len = QCAFRM_MIN_LEN - skb->len;
|
|
|
|
if (qca->txr.skb[qca->txr.tail]) {
|
|
netdev_warn(qca->net_dev, "queue was unexpectedly full!\n");
|
|
netif_stop_queue(qca->net_dev);
|
|
qca->stats.ring_full++;
|
|
return NETDEV_TX_BUSY;
|
|
}
|
|
|
|
if ((skb_headroom(skb) < QCAFRM_HEADER_LEN) ||
|
|
(skb_tailroom(skb) < QCAFRM_FOOTER_LEN + pad_len)) {
|
|
tskb = skb_copy_expand(skb, QCAFRM_HEADER_LEN,
|
|
QCAFRM_FOOTER_LEN + pad_len, GFP_ATOMIC);
|
|
if (!tskb) {
|
|
qca->stats.out_of_mem++;
|
|
return NETDEV_TX_BUSY;
|
|
}
|
|
dev_kfree_skb(skb);
|
|
skb = tskb;
|
|
}
|
|
|
|
frame_len = skb->len + pad_len;
|
|
|
|
ptmp = skb_push(skb, QCAFRM_HEADER_LEN);
|
|
qcafrm_create_header(ptmp, frame_len);
|
|
|
|
if (pad_len) {
|
|
ptmp = skb_put_zero(skb, pad_len);
|
|
}
|
|
|
|
ptmp = skb_put(skb, QCAFRM_FOOTER_LEN);
|
|
qcafrm_create_footer(ptmp);
|
|
|
|
netdev_dbg(qca->net_dev, "Tx-ing packet: Size: 0x%08x\n",
|
|
skb->len);
|
|
|
|
qca->txr.size += skb->len + QCASPI_HW_PKT_LEN;
|
|
|
|
new_tail = qca->txr.tail + 1;
|
|
if (new_tail >= qca->txr.count)
|
|
new_tail = 0;
|
|
|
|
qca->txr.skb[qca->txr.tail] = skb;
|
|
qca->txr.tail = new_tail;
|
|
|
|
if (!qcaspi_tx_ring_has_space(&qca->txr)) {
|
|
netif_stop_queue(qca->net_dev);
|
|
qca->stats.ring_full++;
|
|
}
|
|
|
|
netif_trans_update(dev);
|
|
|
|
if (qca->spi_thread &&
|
|
qca->spi_thread->state != TASK_RUNNING)
|
|
wake_up_process(qca->spi_thread);
|
|
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
static void
|
|
qcaspi_netdev_tx_timeout(struct net_device *dev)
|
|
{
|
|
struct qcaspi *qca = netdev_priv(dev);
|
|
|
|
netdev_info(qca->net_dev, "Transmit timeout at %ld, latency %ld\n",
|
|
jiffies, jiffies - dev_trans_start(dev));
|
|
qca->net_dev->stats.tx_errors++;
|
|
/* Trigger tx queue flush and QCA7000 reset */
|
|
qca->sync = QCASPI_SYNC_UNKNOWN;
|
|
|
|
if (qca->spi_thread)
|
|
wake_up_process(qca->spi_thread);
|
|
}
|
|
|
|
static int
|
|
qcaspi_netdev_init(struct net_device *dev)
|
|
{
|
|
struct qcaspi *qca = netdev_priv(dev);
|
|
|
|
dev->mtu = QCAFRM_MAX_MTU;
|
|
dev->type = ARPHRD_ETHER;
|
|
qca->clkspeed = qcaspi_clkspeed;
|
|
qca->burst_len = qcaspi_burst_len;
|
|
qca->spi_thread = NULL;
|
|
qca->buffer_size = (dev->mtu + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN +
|
|
QCAFRM_FOOTER_LEN + 4) * 4;
|
|
|
|
memset(&qca->stats, 0, sizeof(struct qcaspi_stats));
|
|
|
|
qca->rx_buffer = kmalloc(qca->buffer_size, GFP_KERNEL);
|
|
if (!qca->rx_buffer)
|
|
return -ENOBUFS;
|
|
|
|
qca->rx_skb = netdev_alloc_skb_ip_align(dev, qca->net_dev->mtu +
|
|
VLAN_ETH_HLEN);
|
|
if (!qca->rx_skb) {
|
|
kfree(qca->rx_buffer);
|
|
netdev_info(qca->net_dev, "Failed to allocate RX sk_buff.\n");
|
|
return -ENOBUFS;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
qcaspi_netdev_uninit(struct net_device *dev)
|
|
{
|
|
struct qcaspi *qca = netdev_priv(dev);
|
|
|
|
kfree(qca->rx_buffer);
|
|
qca->buffer_size = 0;
|
|
if (qca->rx_skb)
|
|
dev_kfree_skb(qca->rx_skb);
|
|
}
|
|
|
|
static const struct net_device_ops qcaspi_netdev_ops = {
|
|
.ndo_init = qcaspi_netdev_init,
|
|
.ndo_uninit = qcaspi_netdev_uninit,
|
|
.ndo_open = qcaspi_netdev_open,
|
|
.ndo_stop = qcaspi_netdev_close,
|
|
.ndo_start_xmit = qcaspi_netdev_xmit,
|
|
.ndo_set_mac_address = eth_mac_addr,
|
|
.ndo_tx_timeout = qcaspi_netdev_tx_timeout,
|
|
.ndo_validate_addr = eth_validate_addr,
|
|
};
|
|
|
|
static void
|
|
qcaspi_netdev_setup(struct net_device *dev)
|
|
{
|
|
struct qcaspi *qca = NULL;
|
|
|
|
dev->netdev_ops = &qcaspi_netdev_ops;
|
|
qcaspi_set_ethtool_ops(dev);
|
|
dev->watchdog_timeo = QCASPI_TX_TIMEOUT;
|
|
dev->priv_flags &= ~IFF_TX_SKB_SHARING;
|
|
dev->tx_queue_len = 100;
|
|
|
|
/* MTU range: 46 - 1500 */
|
|
dev->min_mtu = QCAFRM_MIN_MTU;
|
|
dev->max_mtu = QCAFRM_MAX_MTU;
|
|
|
|
qca = netdev_priv(dev);
|
|
memset(qca, 0, sizeof(struct qcaspi));
|
|
|
|
memset(&qca->txr, 0, sizeof(qca->txr));
|
|
qca->txr.count = TX_RING_MAX_LEN;
|
|
}
|
|
|
|
static const struct of_device_id qca_spi_of_match[] = {
|
|
{ .compatible = "qca,qca7000" },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, qca_spi_of_match);
|
|
|
|
static int
|
|
qca_spi_probe(struct spi_device *spi)
|
|
{
|
|
struct qcaspi *qca = NULL;
|
|
struct net_device *qcaspi_devs = NULL;
|
|
u8 legacy_mode = 0;
|
|
u16 signature;
|
|
const char *mac;
|
|
|
|
if (!spi->dev.of_node) {
|
|
dev_err(&spi->dev, "Missing device tree\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
legacy_mode = of_property_read_bool(spi->dev.of_node,
|
|
"qca,legacy-mode");
|
|
|
|
if (qcaspi_clkspeed == 0) {
|
|
if (spi->max_speed_hz)
|
|
qcaspi_clkspeed = spi->max_speed_hz;
|
|
else
|
|
qcaspi_clkspeed = QCASPI_CLK_SPEED;
|
|
}
|
|
|
|
if ((qcaspi_clkspeed < QCASPI_CLK_SPEED_MIN) ||
|
|
(qcaspi_clkspeed > QCASPI_CLK_SPEED_MAX)) {
|
|
dev_err(&spi->dev, "Invalid clkspeed: %d\n",
|
|
qcaspi_clkspeed);
|
|
return -EINVAL;
|
|
}
|
|
|
|
if ((qcaspi_burst_len < QCASPI_BURST_LEN_MIN) ||
|
|
(qcaspi_burst_len > QCASPI_BURST_LEN_MAX)) {
|
|
dev_err(&spi->dev, "Invalid burst len: %d\n",
|
|
qcaspi_burst_len);
|
|
return -EINVAL;
|
|
}
|
|
|
|
if ((qcaspi_pluggable < QCASPI_PLUGGABLE_MIN) ||
|
|
(qcaspi_pluggable > QCASPI_PLUGGABLE_MAX)) {
|
|
dev_err(&spi->dev, "Invalid pluggable: %d\n",
|
|
qcaspi_pluggable);
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (wr_verify < QCASPI_WRITE_VERIFY_MIN ||
|
|
wr_verify > QCASPI_WRITE_VERIFY_MAX) {
|
|
dev_err(&spi->dev, "Invalid write verify: %d\n",
|
|
wr_verify);
|
|
return -EINVAL;
|
|
}
|
|
|
|
dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n",
|
|
QCASPI_DRV_VERSION,
|
|
qcaspi_clkspeed,
|
|
qcaspi_burst_len,
|
|
qcaspi_pluggable);
|
|
|
|
spi->mode = SPI_MODE_3;
|
|
spi->max_speed_hz = qcaspi_clkspeed;
|
|
if (spi_setup(spi) < 0) {
|
|
dev_err(&spi->dev, "Unable to setup SPI device\n");
|
|
return -EFAULT;
|
|
}
|
|
|
|
qcaspi_devs = alloc_etherdev(sizeof(struct qcaspi));
|
|
if (!qcaspi_devs)
|
|
return -ENOMEM;
|
|
|
|
qcaspi_netdev_setup(qcaspi_devs);
|
|
SET_NETDEV_DEV(qcaspi_devs, &spi->dev);
|
|
|
|
qca = netdev_priv(qcaspi_devs);
|
|
if (!qca) {
|
|
free_netdev(qcaspi_devs);
|
|
dev_err(&spi->dev, "Fail to retrieve private structure\n");
|
|
return -ENOMEM;
|
|
}
|
|
qca->net_dev = qcaspi_devs;
|
|
qca->spi_dev = spi;
|
|
qca->legacy_mode = legacy_mode;
|
|
|
|
spi_set_drvdata(spi, qcaspi_devs);
|
|
|
|
mac = of_get_mac_address(spi->dev.of_node);
|
|
|
|
if (!IS_ERR(mac))
|
|
ether_addr_copy(qca->net_dev->dev_addr, mac);
|
|
|
|
if (!is_valid_ether_addr(qca->net_dev->dev_addr)) {
|
|
eth_hw_addr_random(qca->net_dev);
|
|
dev_info(&spi->dev, "Using random MAC address: %pM\n",
|
|
qca->net_dev->dev_addr);
|
|
}
|
|
|
|
netif_carrier_off(qca->net_dev);
|
|
|
|
if (!qcaspi_pluggable) {
|
|
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
|
qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature);
|
|
|
|
if (signature != QCASPI_GOOD_SIGNATURE) {
|
|
dev_err(&spi->dev, "Invalid signature (0x%04X)\n",
|
|
signature);
|
|
free_netdev(qcaspi_devs);
|
|
return -EFAULT;
|
|
}
|
|
}
|
|
|
|
if (register_netdev(qcaspi_devs)) {
|
|
dev_err(&spi->dev, "Unable to register net device %s\n",
|
|
qcaspi_devs->name);
|
|
free_netdev(qcaspi_devs);
|
|
return -EFAULT;
|
|
}
|
|
|
|
qcaspi_init_device_debugfs(qca);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
qca_spi_remove(struct spi_device *spi)
|
|
{
|
|
struct net_device *qcaspi_devs = spi_get_drvdata(spi);
|
|
struct qcaspi *qca = netdev_priv(qcaspi_devs);
|
|
|
|
qcaspi_remove_device_debugfs(qca);
|
|
|
|
unregister_netdev(qcaspi_devs);
|
|
free_netdev(qcaspi_devs);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct spi_device_id qca_spi_id[] = {
|
|
{ "qca7000", 0 },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(spi, qca_spi_id);
|
|
|
|
static struct spi_driver qca_spi_driver = {
|
|
.driver = {
|
|
.name = QCASPI_DRV_NAME,
|
|
.of_match_table = qca_spi_of_match,
|
|
},
|
|
.id_table = qca_spi_id,
|
|
.probe = qca_spi_probe,
|
|
.remove = qca_spi_remove,
|
|
};
|
|
module_spi_driver(qca_spi_driver);
|
|
|
|
MODULE_DESCRIPTION("Qualcomm Atheros QCA7000 SPI Driver");
|
|
MODULE_AUTHOR("Qualcomm Atheros Communications");
|
|
MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>");
|
|
MODULE_LICENSE("Dual BSD/GPL");
|
|
MODULE_VERSION(QCASPI_DRV_VERSION);
|