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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 14:15:10 +07:00
f4ca7a9260
1. the frequency of csr clock is 66.5MHz, so the csr_clk value should
be 0 other than 5.
2. the csr_clk can be got from device tree, so remove initialization here.
Fixes:
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.. | ||
altr_tse_pcs.c | ||
altr_tse_pcs.h | ||
chain_mode.c | ||
common.h | ||
descs_com.h | ||
descs.h | ||
dwmac4_core.c | ||
dwmac4_descs.c | ||
dwmac4_descs.h | ||
dwmac4_dma.c | ||
dwmac4_dma.h | ||
dwmac4_lib.c | ||
dwmac4.h | ||
dwmac5.c | ||
dwmac5.h | ||
dwmac100_core.c | ||
dwmac100_dma.c | ||
dwmac100.h | ||
dwmac1000_core.c | ||
dwmac1000_dma.c | ||
dwmac1000.h | ||
dwmac_dma.h | ||
dwmac_lib.c | ||
dwmac-anarion.c | ||
dwmac-dwc-qos-eth.c | ||
dwmac-generic.c | ||
dwmac-ipq806x.c | ||
dwmac-lpc18xx.c | ||
dwmac-mediatek.c | ||
dwmac-meson8b.c | ||
dwmac-meson.c | ||
dwmac-oxnas.c | ||
dwmac-qcom-ethqos.c | ||
dwmac-rk.c | ||
dwmac-socfpga.c | ||
dwmac-sti.c | ||
dwmac-stm32.c | ||
dwmac-sun8i.c | ||
dwmac-sunxi.c | ||
dwxgmac2_core.c | ||
dwxgmac2_descs.c | ||
dwxgmac2_dma.c | ||
dwxgmac2.h | ||
enh_desc.c | ||
hwif.c | ||
hwif.h | ||
Kconfig | ||
Makefile | ||
mmc_core.c | ||
mmc.h | ||
norm_desc.c | ||
ring_mode.c | ||
stmmac_ethtool.c | ||
stmmac_hwtstamp.c | ||
stmmac_main.c | ||
stmmac_mdio.c | ||
stmmac_pci.c | ||
stmmac_pcs.h | ||
stmmac_platform.c | ||
stmmac_platform.h | ||
stmmac_ptp.c | ||
stmmac_ptp.h | ||
stmmac_tc.c | ||
stmmac.h |