mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 20:47:12 +07:00
b2ac878acd
* clk-davinci-psc-da830: clk: davinci: psc-da830: fix USB0 48MHz PHY clock registration * clk-renesas: clk: renesas: cpg-mssr: Add support for R-Car E3 clk: renesas: Add r8a77990 CPG Core Clock Definitions clk: renesas: rcar-gen2: Centralize quirks handling clk: renesas: r8a77980: Correct parent clock of PCIEC0 clk: renesas: r8a7794: Fix LB clock divider clk: renesas: r8a7792: Fix LB clock divider clk: renesas: r8a7791/r8a7793: Fix LB clock divider clk: renesas: r8a7745: Fix LB clock divider clk: renesas: r8a7743: Fix LB clock divider clk: renesas: cpg-mssr: Add r8a77470 support clk: renesas: Add r8a77470 CPG Core Clock Definitions clk: renesas: r8a77965: Add MSIOF controller clocks * clk-at91-recalc: clk: at91: PLL recalc_rate() now using cached MUL and DIV values * clk-davinci: clk: davinci: Fix link errors when not all SoCs are enabled clk: davinci: psc: allow for dev == NULL clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE clk: davinci: pll: allow dev == NULL clk: davinci: psc-dm365: fix few clocks clk: davinci: pll-dm646x: keep PLL2 SYSCLK1 always enabled clk: davinci: psc-dm355: fix ASP0/1 clkdev lookups clk: davinci: pll-dm355: fix SYSCLKn parent names clk: davinci: pll-dm355: drop pll2_sysclk2 * clk-meson: clk: meson: axg: let mpll clocks round closest clk: meson: mpll: add round closest support clk: meson: meson8b: mark fclk_div2 gate clocks as CLK_IS_CRITICAL clk: meson: use SPDX license identifiers consistently clk: meson: drop CLK_SET_RATE_PARENT flag clk: meson-axg: Add AO Clock and Reset controller driver clk: meson: aoclk: refactor common code into dedicated file clk: meson: migrate to devm_of_clk_add_hw_provider API clk: meson: gxbb: add the video decoder clocks clk: meson: meson8b: add support for the NAND clocks dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC clk: meson: gxbb: expose VDEC_1 and VDEC_HEVC clocks dt-bindings: clock: meson8b: export the NAND clock |
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| .. | ||
| altr,rst-mgr-a10.h | ||
| altr,rst-mgr-a10sr.h | ||
| altr,rst-mgr-s10.h | ||
| altr,rst-mgr.h | ||
| amlogic,meson8b-clkc-reset.h | ||
| amlogic,meson8b-reset.h | ||
| amlogic,meson-axg-reset.h | ||
| amlogic,meson-gxbb-reset.h | ||
| axg-aoclkc.h | ||
| cortina,gemini-reset.h | ||
| gxbb-aoclkc.h | ||
| hisi,hi6220-resets.h | ||
| imx7-reset.h | ||
| mt2701-resets.h | ||
| mt7622-reset.h | ||
| mt8135-resets.h | ||
| mt8173-resets.h | ||
| oxsemi,ox810se.h | ||
| oxsemi,ox820.h | ||
| pistachio-resets.h | ||
| qcom,gcc-apq8084.h | ||
| qcom,gcc-ipq806x.h | ||
| qcom,gcc-mdm9615.h | ||
| qcom,gcc-msm8660.h | ||
| qcom,gcc-msm8916.h | ||
| qcom,gcc-msm8960.h | ||
| qcom,gcc-msm8974.h | ||
| qcom,mmcc-apq8084.h | ||
| qcom,mmcc-msm8960.h | ||
| qcom,mmcc-msm8974.h | ||
| snps,hsdk-reset.h | ||
| stih407-resets.h | ||
| stih415-resets.h | ||
| stih416-resets.h | ||
| stm32mp1-resets.h | ||
| sun4i-a10-ccu.h | ||
| sun5i-ccu.h | ||
| sun6i-a31-ccu.h | ||
| sun8i-a23-a33-ccu.h | ||
| sun8i-a83t-ccu.h | ||
| sun8i-de2.h | ||
| sun8i-h3-ccu.h | ||
| sun8i-r40-ccu.h | ||
| sun8i-r-ccu.h | ||
| sun8i-v3s-ccu.h | ||
| sun9i-a80-ccu.h | ||
| sun9i-a80-de.h | ||
| sun9i-a80-usb.h | ||
| sun50i-a64-ccu.h | ||
| sun50i-h6-ccu.h | ||
| sun50i-h6-r-ccu.h | ||
| tegra124-car.h | ||
| tegra186-reset.h | ||
| tegra194-reset.h | ||
| tegra210-car.h | ||
| ti-syscon.h | ||