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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-20 03:47:08 +07:00
3fc2579e6f
When testing in userspace, UBSAN pointed out that shifting into the sign bit is undefined behaviour. It doesn't really make sense to ask for the highest set bit of a negative value, so just turn the argument type into an unsigned int. Some architectures (eg ppc) already had it declared as an unsigned int, so I don't expect too many problems. Link: http://lkml.kernel.org/r/20181105221117.31828-1-willy@infradead.org Signed-off-by: Matthew Wilcox <willy@infradead.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
535 lines
12 KiB
C
535 lines
12 KiB
C
#ifndef _M68K_BITOPS_H
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#define _M68K_BITOPS_H
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/*
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* Copyright 1992, Linus Torvalds.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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#ifndef _LINUX_BITOPS_H
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#error only <linux/bitops.h> can be included directly
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#endif
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#include <linux/compiler.h>
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#include <asm/barrier.h>
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/*
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* Bit access functions vary across the ColdFire and 68k families.
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* So we will break them out here, and then macro in the ones we want.
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*
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* ColdFire - supports standard bset/bclr/bchg with register operand only
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* 68000 - supports standard bset/bclr/bchg with memory operand
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* >= 68020 - also supports the bfset/bfclr/bfchg instructions
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*
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* Although it is possible to use only the bset/bclr/bchg with register
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* operands on all platforms you end up with larger generated code.
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* So we use the best form possible on a given platform.
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*/
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static inline void bset_reg_set_bit(int nr, volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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__asm__ __volatile__ ("bset %1,(%0)"
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:
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: "a" (p), "di" (nr & 7)
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: "memory");
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}
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static inline void bset_mem_set_bit(int nr, volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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__asm__ __volatile__ ("bset %1,%0"
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: "+m" (*p)
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: "di" (nr & 7));
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}
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static inline void bfset_mem_set_bit(int nr, volatile unsigned long *vaddr)
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{
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__asm__ __volatile__ ("bfset %1{%0:#1}"
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:
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: "d" (nr ^ 31), "o" (*vaddr)
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: "memory");
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}
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#if defined(CONFIG_COLDFIRE)
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#define set_bit(nr, vaddr) bset_reg_set_bit(nr, vaddr)
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#elif defined(CONFIG_CPU_HAS_NO_BITFIELDS)
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#define set_bit(nr, vaddr) bset_mem_set_bit(nr, vaddr)
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#else
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#define set_bit(nr, vaddr) (__builtin_constant_p(nr) ? \
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bset_mem_set_bit(nr, vaddr) : \
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bfset_mem_set_bit(nr, vaddr))
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#endif
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#define __set_bit(nr, vaddr) set_bit(nr, vaddr)
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static inline void bclr_reg_clear_bit(int nr, volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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__asm__ __volatile__ ("bclr %1,(%0)"
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:
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: "a" (p), "di" (nr & 7)
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: "memory");
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}
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static inline void bclr_mem_clear_bit(int nr, volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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__asm__ __volatile__ ("bclr %1,%0"
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: "+m" (*p)
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: "di" (nr & 7));
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}
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static inline void bfclr_mem_clear_bit(int nr, volatile unsigned long *vaddr)
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{
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__asm__ __volatile__ ("bfclr %1{%0:#1}"
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:
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: "d" (nr ^ 31), "o" (*vaddr)
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: "memory");
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}
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#if defined(CONFIG_COLDFIRE)
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#define clear_bit(nr, vaddr) bclr_reg_clear_bit(nr, vaddr)
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#elif defined(CONFIG_CPU_HAS_NO_BITFIELDS)
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#define clear_bit(nr, vaddr) bclr_mem_clear_bit(nr, vaddr)
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#else
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#define clear_bit(nr, vaddr) (__builtin_constant_p(nr) ? \
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bclr_mem_clear_bit(nr, vaddr) : \
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bfclr_mem_clear_bit(nr, vaddr))
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#endif
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#define __clear_bit(nr, vaddr) clear_bit(nr, vaddr)
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static inline void bchg_reg_change_bit(int nr, volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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__asm__ __volatile__ ("bchg %1,(%0)"
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:
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: "a" (p), "di" (nr & 7)
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: "memory");
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}
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static inline void bchg_mem_change_bit(int nr, volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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__asm__ __volatile__ ("bchg %1,%0"
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: "+m" (*p)
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: "di" (nr & 7));
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}
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static inline void bfchg_mem_change_bit(int nr, volatile unsigned long *vaddr)
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{
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__asm__ __volatile__ ("bfchg %1{%0:#1}"
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:
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: "d" (nr ^ 31), "o" (*vaddr)
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: "memory");
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}
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#if defined(CONFIG_COLDFIRE)
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#define change_bit(nr, vaddr) bchg_reg_change_bit(nr, vaddr)
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#elif defined(CONFIG_CPU_HAS_NO_BITFIELDS)
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#define change_bit(nr, vaddr) bchg_mem_change_bit(nr, vaddr)
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#else
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#define change_bit(nr, vaddr) (__builtin_constant_p(nr) ? \
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bchg_mem_change_bit(nr, vaddr) : \
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bfchg_mem_change_bit(nr, vaddr))
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#endif
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#define __change_bit(nr, vaddr) change_bit(nr, vaddr)
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static inline int test_bit(int nr, const volatile unsigned long *vaddr)
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{
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return (vaddr[nr >> 5] & (1UL << (nr & 31))) != 0;
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}
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static inline int bset_reg_test_and_set_bit(int nr,
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volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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char retval;
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__asm__ __volatile__ ("bset %2,(%1); sne %0"
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: "=d" (retval)
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: "a" (p), "di" (nr & 7)
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: "memory");
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return retval;
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}
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static inline int bset_mem_test_and_set_bit(int nr,
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volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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char retval;
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__asm__ __volatile__ ("bset %2,%1; sne %0"
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: "=d" (retval), "+m" (*p)
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: "di" (nr & 7));
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return retval;
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}
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static inline int bfset_mem_test_and_set_bit(int nr,
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volatile unsigned long *vaddr)
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{
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char retval;
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__asm__ __volatile__ ("bfset %2{%1:#1}; sne %0"
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: "=d" (retval)
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: "d" (nr ^ 31), "o" (*vaddr)
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: "memory");
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return retval;
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}
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#if defined(CONFIG_COLDFIRE)
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#define test_and_set_bit(nr, vaddr) bset_reg_test_and_set_bit(nr, vaddr)
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#elif defined(CONFIG_CPU_HAS_NO_BITFIELDS)
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#define test_and_set_bit(nr, vaddr) bset_mem_test_and_set_bit(nr, vaddr)
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#else
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#define test_and_set_bit(nr, vaddr) (__builtin_constant_p(nr) ? \
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bset_mem_test_and_set_bit(nr, vaddr) : \
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bfset_mem_test_and_set_bit(nr, vaddr))
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#endif
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#define __test_and_set_bit(nr, vaddr) test_and_set_bit(nr, vaddr)
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static inline int bclr_reg_test_and_clear_bit(int nr,
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volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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char retval;
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__asm__ __volatile__ ("bclr %2,(%1); sne %0"
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: "=d" (retval)
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: "a" (p), "di" (nr & 7)
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: "memory");
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return retval;
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}
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static inline int bclr_mem_test_and_clear_bit(int nr,
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volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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char retval;
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__asm__ __volatile__ ("bclr %2,%1; sne %0"
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: "=d" (retval), "+m" (*p)
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: "di" (nr & 7));
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return retval;
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}
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static inline int bfclr_mem_test_and_clear_bit(int nr,
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volatile unsigned long *vaddr)
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{
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char retval;
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__asm__ __volatile__ ("bfclr %2{%1:#1}; sne %0"
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: "=d" (retval)
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: "d" (nr ^ 31), "o" (*vaddr)
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: "memory");
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return retval;
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}
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#if defined(CONFIG_COLDFIRE)
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#define test_and_clear_bit(nr, vaddr) bclr_reg_test_and_clear_bit(nr, vaddr)
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#elif defined(CONFIG_CPU_HAS_NO_BITFIELDS)
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#define test_and_clear_bit(nr, vaddr) bclr_mem_test_and_clear_bit(nr, vaddr)
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#else
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#define test_and_clear_bit(nr, vaddr) (__builtin_constant_p(nr) ? \
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bclr_mem_test_and_clear_bit(nr, vaddr) : \
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bfclr_mem_test_and_clear_bit(nr, vaddr))
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#endif
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#define __test_and_clear_bit(nr, vaddr) test_and_clear_bit(nr, vaddr)
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static inline int bchg_reg_test_and_change_bit(int nr,
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volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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char retval;
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__asm__ __volatile__ ("bchg %2,(%1); sne %0"
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: "=d" (retval)
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: "a" (p), "di" (nr & 7)
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: "memory");
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return retval;
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}
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static inline int bchg_mem_test_and_change_bit(int nr,
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volatile unsigned long *vaddr)
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{
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char *p = (char *)vaddr + (nr ^ 31) / 8;
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char retval;
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__asm__ __volatile__ ("bchg %2,%1; sne %0"
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: "=d" (retval), "+m" (*p)
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: "di" (nr & 7));
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return retval;
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}
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static inline int bfchg_mem_test_and_change_bit(int nr,
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volatile unsigned long *vaddr)
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{
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char retval;
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__asm__ __volatile__ ("bfchg %2{%1:#1}; sne %0"
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: "=d" (retval)
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: "d" (nr ^ 31), "o" (*vaddr)
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: "memory");
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return retval;
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}
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#if defined(CONFIG_COLDFIRE)
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#define test_and_change_bit(nr, vaddr) bchg_reg_test_and_change_bit(nr, vaddr)
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#elif defined(CONFIG_CPU_HAS_NO_BITFIELDS)
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#define test_and_change_bit(nr, vaddr) bchg_mem_test_and_change_bit(nr, vaddr)
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#else
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#define test_and_change_bit(nr, vaddr) (__builtin_constant_p(nr) ? \
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bchg_mem_test_and_change_bit(nr, vaddr) : \
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bfchg_mem_test_and_change_bit(nr, vaddr))
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#endif
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#define __test_and_change_bit(nr, vaddr) test_and_change_bit(nr, vaddr)
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/*
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* The true 68020 and more advanced processors support the "bfffo"
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* instruction for finding bits. ColdFire and simple 68000 parts
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* (including CPU32) do not support this. They simply use the generic
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* functions.
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*/
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#if defined(CONFIG_CPU_HAS_NO_BITFIELDS)
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#include <asm-generic/bitops/ffz.h>
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#else
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static inline int find_first_zero_bit(const unsigned long *vaddr,
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unsigned size)
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{
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const unsigned long *p = vaddr;
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int res = 32;
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unsigned int words;
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unsigned long num;
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if (!size)
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return 0;
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words = (size + 31) >> 5;
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while (!(num = ~*p++)) {
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if (!--words)
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goto out;
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}
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__asm__ __volatile__ ("bfffo %1{#0,#0},%0"
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: "=d" (res) : "d" (num & -num));
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res ^= 31;
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out:
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res += ((long)p - (long)vaddr - 4) * 8;
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return res < size ? res : size;
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}
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#define find_first_zero_bit find_first_zero_bit
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static inline int find_next_zero_bit(const unsigned long *vaddr, int size,
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int offset)
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{
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const unsigned long *p = vaddr + (offset >> 5);
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int bit = offset & 31UL, res;
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if (offset >= size)
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return size;
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if (bit) {
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unsigned long num = ~*p++ & (~0UL << bit);
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offset -= bit;
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/* Look for zero in first longword */
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__asm__ __volatile__ ("bfffo %1{#0,#0},%0"
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: "=d" (res) : "d" (num & -num));
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if (res < 32) {
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offset += res ^ 31;
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return offset < size ? offset : size;
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}
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offset += 32;
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if (offset >= size)
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return size;
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}
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/* No zero yet, search remaining full bytes for a zero */
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return offset + find_first_zero_bit(p, size - offset);
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}
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#define find_next_zero_bit find_next_zero_bit
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static inline int find_first_bit(const unsigned long *vaddr, unsigned size)
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{
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const unsigned long *p = vaddr;
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int res = 32;
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unsigned int words;
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unsigned long num;
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if (!size)
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return 0;
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words = (size + 31) >> 5;
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while (!(num = *p++)) {
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if (!--words)
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goto out;
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}
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__asm__ __volatile__ ("bfffo %1{#0,#0},%0"
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: "=d" (res) : "d" (num & -num));
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res ^= 31;
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out:
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res += ((long)p - (long)vaddr - 4) * 8;
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return res < size ? res : size;
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}
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#define find_first_bit find_first_bit
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static inline int find_next_bit(const unsigned long *vaddr, int size,
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int offset)
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{
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const unsigned long *p = vaddr + (offset >> 5);
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int bit = offset & 31UL, res;
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if (offset >= size)
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return size;
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if (bit) {
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unsigned long num = *p++ & (~0UL << bit);
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offset -= bit;
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/* Look for one in first longword */
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__asm__ __volatile__ ("bfffo %1{#0,#0},%0"
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: "=d" (res) : "d" (num & -num));
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if (res < 32) {
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offset += res ^ 31;
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return offset < size ? offset : size;
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}
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offset += 32;
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if (offset >= size)
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return size;
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}
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/* No one yet, search remaining full bytes for a one */
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return offset + find_first_bit(p, size - offset);
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}
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#define find_next_bit find_next_bit
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/*
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* ffz = Find First Zero in word. Undefined if no zero exists,
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* so code should check against ~0UL first..
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*/
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static inline unsigned long ffz(unsigned long word)
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{
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int res;
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__asm__ __volatile__ ("bfffo %1{#0,#0},%0"
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: "=d" (res) : "d" (~word & -~word));
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return res ^ 31;
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}
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#endif
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#include <asm-generic/bitops/find.h>
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#ifdef __KERNEL__
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#if defined(CONFIG_CPU_HAS_NO_BITFIELDS)
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/*
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* The newer ColdFire family members support a "bitrev" instruction
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* and we can use that to implement a fast ffs. Older Coldfire parts,
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* and normal 68000 parts don't have anything special, so we use the
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* generic functions for those.
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*/
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#if (defined(__mcfisaaplus__) || defined(__mcfisac__)) && \
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!defined(CONFIG_M68000) && !defined(CONFIG_MCPU32)
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static inline unsigned long __ffs(unsigned long x)
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{
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__asm__ __volatile__ ("bitrev %0; ff1 %0"
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: "=d" (x)
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: "0" (x));
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return x;
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}
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static inline int ffs(int x)
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{
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if (!x)
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return 0;
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return __ffs(x) + 1;
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}
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#else
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#include <asm-generic/bitops/ffs.h>
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#include <asm-generic/bitops/__ffs.h>
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#endif
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#include <asm-generic/bitops/fls.h>
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#include <asm-generic/bitops/__fls.h>
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#else
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/*
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* ffs: find first bit set. This is defined the same way as
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* the libc and compiler builtin ffs routines, therefore
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* differs in spirit from the above ffz (man ffs).
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*/
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static inline int ffs(int x)
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{
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int cnt;
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|
__asm__ ("bfffo %1{#0:#0},%0"
|
|
: "=d" (cnt)
|
|
: "dm" (x & -x));
|
|
return 32 - cnt;
|
|
}
|
|
|
|
static inline unsigned long __ffs(unsigned long x)
|
|
{
|
|
return ffs(x) - 1;
|
|
}
|
|
|
|
/*
|
|
* fls: find last bit set.
|
|
*/
|
|
static inline int fls(unsigned int x)
|
|
{
|
|
int cnt;
|
|
|
|
__asm__ ("bfffo %1{#0,#0},%0"
|
|
: "=d" (cnt)
|
|
: "dm" (x));
|
|
return 32 - cnt;
|
|
}
|
|
|
|
static inline int __fls(int x)
|
|
{
|
|
return fls(x) - 1;
|
|
}
|
|
|
|
#endif
|
|
|
|
/* Simple test-and-set bit locks */
|
|
#define test_and_set_bit_lock test_and_set_bit
|
|
#define clear_bit_unlock clear_bit
|
|
#define __clear_bit_unlock clear_bit_unlock
|
|
|
|
#include <asm-generic/bitops/ext2-atomic.h>
|
|
#include <asm-generic/bitops/le.h>
|
|
#include <asm-generic/bitops/fls64.h>
|
|
#include <asm-generic/bitops/sched.h>
|
|
#include <asm-generic/bitops/hweight.h>
|
|
#endif /* __KERNEL__ */
|
|
|
|
#endif /* _M68K_BITOPS_H */
|