mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 21:25:33 +07:00
f853f00531
Add the on-chip SRAM present within the MCU domain as a mmio-sram node. The K3 AM65x SoCs have 512 KB of such memory. Any specific memory range within this RAM needed by a software module ought to be reserved using an appropriate child node. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
99 lines
2.5 KiB
Plaintext
99 lines
2.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Device Tree Source for AM6 SoC Family MCU Domain peripherals
|
|
*
|
|
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
|
|
*/
|
|
|
|
&cbass_mcu {
|
|
mcu_uart0: serial@40a00000 {
|
|
compatible = "ti,am654-uart";
|
|
reg = <0x00 0x40a00000 0x00 0x100>;
|
|
reg-shift = <2>;
|
|
reg-io-width = <4>;
|
|
interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
|
|
clock-frequency = <96000000>;
|
|
current-speed = <115200>;
|
|
power-domains = <&k3_pds 149>;
|
|
};
|
|
|
|
mcu_ram: sram@41c00000 {
|
|
compatible = "mmio-sram";
|
|
reg = <0x00 0x41c00000 0x00 0x80000>;
|
|
ranges = <0x0 0x00 0x41c00000 0x80000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
};
|
|
|
|
mcu_i2c0: i2c@40b00000 {
|
|
compatible = "ti,am654-i2c", "ti,omap4-i2c";
|
|
reg = <0x0 0x40b00000 0x0 0x100>;
|
|
interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clock-names = "fck";
|
|
clocks = <&k3_clks 114 1>;
|
|
power-domains = <&k3_pds 114>;
|
|
};
|
|
|
|
mcu_spi0: spi@40300000 {
|
|
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
|
reg = <0x0 0x40300000 0x0 0x400>;
|
|
interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&k3_clks 142 1>;
|
|
power-domains = <&k3_pds 142>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
mcu_spi1: spi@40310000 {
|
|
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
|
reg = <0x0 0x40310000 0x0 0x400>;
|
|
interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&k3_clks 143 1>;
|
|
power-domains = <&k3_pds 143>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
mcu_spi2: spi@40320000 {
|
|
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
|
reg = <0x0 0x40320000 0x0 0x400>;
|
|
interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&k3_clks 144 1>;
|
|
power-domains = <&k3_pds 144>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
tscadc0: tscadc@40200000 {
|
|
compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
|
|
reg = <0x0 0x40200000 0x0 0x1000>;
|
|
interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&k3_clks 0 2>;
|
|
assigned-clocks = <&k3_clks 0 2>;
|
|
assigned-clock-rates = <60000000>;
|
|
clock-names = "adc_tsc_fck";
|
|
|
|
adc {
|
|
#io-channel-cells = <1>;
|
|
compatible = "ti,am654-adc", "ti,am3359-adc";
|
|
};
|
|
};
|
|
|
|
tscadc1: tscadc@40210000 {
|
|
compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
|
|
reg = <0x0 0x40210000 0x0 0x1000>;
|
|
interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&k3_clks 1 2>;
|
|
assigned-clocks = <&k3_clks 1 2>;
|
|
assigned-clock-rates = <60000000>;
|
|
clock-names = "adc_tsc_fck";
|
|
|
|
adc {
|
|
#io-channel-cells = <1>;
|
|
compatible = "ti,am654-adc", "ti,am3359-adc";
|
|
};
|
|
};
|
|
};
|