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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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dc4aedbf7c
The implementation hardcodes a workaround for the H3 ES1.x SoC regardless of the SoC revision, as the workaround can be safely applied on all devices in the Gen3 family without any side effect. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
125 lines
3.3 KiB
C
125 lines
3.3 KiB
C
/*
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* rcar_du_drv.h -- R-Car Display Unit DRM driver
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*
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* Copyright (C) 2013-2015 Renesas Electronics Corporation
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __RCAR_DU_DRV_H__
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#define __RCAR_DU_DRV_H__
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#include <linux/kernel.h>
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#include <linux/wait.h>
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#include "rcar_du_crtc.h"
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#include "rcar_du_group.h"
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#include "rcar_du_vsp.h"
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struct clk;
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struct device;
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struct drm_device;
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struct drm_fbdev_cma;
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struct rcar_du_device;
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struct rcar_du_lvdsenc;
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#define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK (1 << 0) /* Per-CRTC IRQ and clock */
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#define RCAR_DU_FEATURE_EXT_CTRL_REGS (1 << 1) /* Has extended control registers */
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#define RCAR_DU_FEATURE_VSP1_SOURCE (1 << 2) /* Has inputs from VSP1 */
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#define RCAR_DU_QUIRK_ALIGN_128B (1 << 0) /* Align pitches to 128 bytes */
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#define RCAR_DU_QUIRK_LVDS_LANES (1 << 1) /* LVDS lanes 1 and 3 inverted */
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/*
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* struct rcar_du_output_routing - Output routing specification
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* @possible_crtcs: bitmask of possible CRTCs for the output
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* @port: device tree port number corresponding to this output route
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*
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* The DU has 5 possible outputs (DPAD0/1, LVDS0/1, TCON). Output routing data
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* specify the valid SoC outputs, which CRTCs can drive the output, and the type
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* of in-SoC encoder for the output.
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*/
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struct rcar_du_output_routing {
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unsigned int possible_crtcs;
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unsigned int port;
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};
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/*
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* struct rcar_du_device_info - DU model-specific information
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* @gen: device generation (2 or 3)
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* @features: device features (RCAR_DU_FEATURE_*)
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* @quirks: device quirks (RCAR_DU_QUIRK_*)
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* @num_crtcs: total number of CRTCs
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* @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*)
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* @num_lvds: number of internal LVDS encoders
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*/
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struct rcar_du_device_info {
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unsigned int gen;
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unsigned int features;
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unsigned int quirks;
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unsigned int num_crtcs;
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struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
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unsigned int num_lvds;
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unsigned int dpll_ch;
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};
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#define RCAR_DU_MAX_CRTCS 4
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#define RCAR_DU_MAX_GROUPS DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2)
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#define RCAR_DU_MAX_LVDS 2
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#define RCAR_DU_MAX_VSPS 4
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struct rcar_du_device {
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struct device *dev;
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const struct rcar_du_device_info *info;
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void __iomem *mmio;
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struct drm_device *ddev;
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struct drm_fbdev_cma *fbdev;
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struct rcar_du_crtc crtcs[RCAR_DU_MAX_CRTCS];
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unsigned int num_crtcs;
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struct rcar_du_group groups[RCAR_DU_MAX_GROUPS];
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struct rcar_du_vsp vsps[RCAR_DU_MAX_VSPS];
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struct {
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struct drm_property *alpha;
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struct drm_property *colorkey;
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} props;
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unsigned int dpad0_source;
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unsigned int vspd1_sink;
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struct rcar_du_lvdsenc *lvds[RCAR_DU_MAX_LVDS];
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};
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static inline bool rcar_du_has(struct rcar_du_device *rcdu,
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unsigned int feature)
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{
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return rcdu->info->features & feature;
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}
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static inline bool rcar_du_needs(struct rcar_du_device *rcdu,
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unsigned int quirk)
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{
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return rcdu->info->quirks & quirk;
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}
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static inline u32 rcar_du_read(struct rcar_du_device *rcdu, u32 reg)
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{
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return ioread32(rcdu->mmio + reg);
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}
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static inline void rcar_du_write(struct rcar_du_device *rcdu, u32 reg, u32 data)
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{
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iowrite32(data, rcdu->mmio + reg);
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}
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#endif /* __RCAR_DU_DRV_H__ */
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