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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c4574aa00e
There are general changes pending to make the /aliases/serial* entries number the serial ports on the system. On Tegra, so far the ports have been just numbered dynamically as they are configured so that makes them change. To avoid this, add specific aliases per board to keep the old numbers. This allows us to change the numbering by default on future SoCs while keeping the numbering on existing boards. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Thierry Reding <treding@nvidia.com>
131 lines
2.8 KiB
Plaintext
131 lines
2.8 KiB
Plaintext
/dts-v1/;
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#include "tegra20-tamonten.dtsi"
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/ {
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model = "Avionic Design Medcom-Wide board";
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compatible = "ad,medcom-wide", "ad,tamonten", "nvidia,tegra20";
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aliases {
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serial0 = &uartd;
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};
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pwm@7000a000 {
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status = "okay";
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};
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host1x@50000000 {
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dc@54200000 {
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rgb {
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status = "okay";
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nvidia,panel = <&panel>;
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};
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};
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};
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i2c@7000c000 {
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wm8903: wm8903@1a {
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compatible = "wlf,wm8903";
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reg = <0x1a>;
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interrupt-parent = <&gpio>;
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interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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micdet-cfg = <0>;
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micdet-delay = <100>;
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gpio-cfg = <0xffffffff
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0xffffffff
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0
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0xffffffff
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0xffffffff>;
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};
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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};
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panel: panel {
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compatible = "innolux,n156bge-l21", "simple-panel";
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power-supply = <&vdd_1v8_reg>, <&vdd_3v3_reg>;
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enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
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backlight = <&backlight>;
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};
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sound {
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compatible = "ad,tegra-audio-wm8903-medcom-wide",
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"nvidia,tegra-audio-wm8903";
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nvidia,model = "Avionic Design Medcom-Wide";
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nvidia,audio-routing =
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"Headphone Jack", "HPOUTR",
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"Headphone Jack", "HPOUTL",
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"Int Spk", "ROP",
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"Int Spk", "RON",
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"Int Spk", "LOP",
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"Int Spk", "LON",
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"Mic Jack", "MICBIAS",
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"IN1L", "Mic Jack";
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nvidia,i2s-controller = <&tegra_i2s1>;
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nvidia,audio-codec = <&wm8903>;
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nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
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nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
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clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
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<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
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<&tegra_car TEGRA20_CLK_CDEV1>;
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clock-names = "pll_a", "pll_a_out0", "mclk";
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};
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regulators {
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vcc_24v_reg: regulator@100 {
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compatible = "regulator-fixed";
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reg = <100>;
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regulator-name = "vcc_24v";
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regulator-min-microvolt = <24000000>;
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regulator-max-microvolt = <24000000>;
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regulator-always-on;
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};
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vdd_5v0_reg: regulator@101 {
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compatible = "regulator-fixed";
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reg = <101>;
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regulator-name = "vdd_5v0";
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vin-supply = <&vcc_24v_reg>;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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vdd_3v3_reg: regulator@102 {
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compatible = "regulator-fixed";
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reg = <102>;
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regulator-name = "vdd_3v3";
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vin-supply = <&vcc_24v_reg>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd_1v8_reg: regulator@103 {
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compatible = "regulator-fixed";
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reg = <103>;
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regulator-name = "vdd_1v8";
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vin-supply = <&vdd_3v3_reg>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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};
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};
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