mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 17:40:54 +07:00
f3c8cfc237
Current pxa3xx_nand controller has two chip select which both be workable. This patch enable this feature. Update platform driver to support this feature. Another notice should be taken that: When you want to use this feature, you should not enable the keep configuration feature, for two chip select could be attached with different nand chip. The different page size and timing requirement make the keep configuration impossible. Signed-off-by: Lei Wen <leiwen@marvell.com>
255 lines
5.5 KiB
C
255 lines
5.5 KiB
C
/*
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* linux/arch/arm/mach-mmp/aspenite.c
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*
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* Support for the Marvell PXA168-based Aspenite and Zylonite2
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* Development Platform.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/smc91x.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/nand.h>
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#include <linux/interrupt.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <mach/addr-map.h>
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#include <mach/mfp-pxa168.h>
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#include <mach/pxa168.h>
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#include <mach/gpio.h>
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#include <video/pxa168fb.h>
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#include <linux/input.h>
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#include <plat/pxa27x_keypad.h>
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#include "common.h"
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static unsigned long common_pin_config[] __initdata = {
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/* Data Flash Interface */
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GPIO0_DFI_D15,
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GPIO1_DFI_D14,
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GPIO2_DFI_D13,
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GPIO3_DFI_D12,
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GPIO4_DFI_D11,
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GPIO5_DFI_D10,
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GPIO6_DFI_D9,
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GPIO7_DFI_D8,
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GPIO8_DFI_D7,
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GPIO9_DFI_D6,
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GPIO10_DFI_D5,
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GPIO11_DFI_D4,
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GPIO12_DFI_D3,
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GPIO13_DFI_D2,
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GPIO14_DFI_D1,
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GPIO15_DFI_D0,
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/* Static Memory Controller */
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GPIO18_SMC_nCS0,
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GPIO34_SMC_nCS1,
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GPIO23_SMC_nLUA,
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GPIO25_SMC_nLLA,
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GPIO28_SMC_RDY,
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GPIO29_SMC_SCLK,
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GPIO35_SMC_BE1,
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GPIO36_SMC_BE2,
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GPIO27_GPIO, /* Ethernet IRQ */
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/* UART1 */
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GPIO107_UART1_RXD,
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GPIO108_UART1_TXD,
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/* SSP1 */
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GPIO113_I2S_MCLK,
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GPIO114_I2S_FRM,
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GPIO115_I2S_BCLK,
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GPIO116_I2S_RXD,
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GPIO117_I2S_TXD,
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/* LCD */
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GPIO56_LCD_FCLK_RD,
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GPIO57_LCD_LCLK_A0,
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GPIO58_LCD_PCLK_WR,
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GPIO59_LCD_DENA_BIAS,
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GPIO60_LCD_DD0,
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GPIO61_LCD_DD1,
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GPIO62_LCD_DD2,
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GPIO63_LCD_DD3,
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GPIO64_LCD_DD4,
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GPIO65_LCD_DD5,
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GPIO66_LCD_DD6,
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GPIO67_LCD_DD7,
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GPIO68_LCD_DD8,
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GPIO69_LCD_DD9,
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GPIO70_LCD_DD10,
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GPIO71_LCD_DD11,
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GPIO72_LCD_DD12,
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GPIO73_LCD_DD13,
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GPIO74_LCD_DD14,
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GPIO75_LCD_DD15,
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GPIO76_LCD_DD16,
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GPIO77_LCD_DD17,
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GPIO78_LCD_DD18,
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GPIO79_LCD_DD19,
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GPIO80_LCD_DD20,
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GPIO81_LCD_DD21,
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GPIO82_LCD_DD22,
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GPIO83_LCD_DD23,
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/* Keypad */
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GPIO109_KP_MKIN1,
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GPIO110_KP_MKIN0,
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GPIO111_KP_MKOUT7,
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GPIO112_KP_MKOUT6,
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GPIO121_KP_MKIN4,
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};
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static struct smc91x_platdata smc91x_info = {
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.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
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};
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = SMC_CS1_PHYS_BASE + 0x300,
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.end = SMC_CS1_PHYS_BASE + 0xfffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = gpio_to_irq(27),
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.end = gpio_to_irq(27),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
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}
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.dev = {
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.platform_data = &smc91x_info,
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},
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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static struct mtd_partition aspenite_nand_partitions[] = {
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{
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.name = "bootloader",
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.offset = 0,
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.size = SZ_1M,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "reserved",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "reserved",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_8M,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = (SZ_2M + SZ_1M),
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.mask_flags = 0,
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}, {
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.name = "filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_48M,
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.mask_flags = 0,
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}
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};
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static struct pxa3xx_nand_platform_data aspenite_nand_info = {
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.enable_arbiter = 1,
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.num_cs = 1,
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.parts[0] = aspenite_nand_partitions,
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.nr_parts[0] = ARRAY_SIZE(aspenite_nand_partitions),
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};
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static struct i2c_board_info aspenite_i2c_info[] __initdata = {
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{ I2C_BOARD_INFO("wm8753", 0x1b), },
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};
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static struct fb_videomode video_modes[] = {
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[0] = {
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.pixclock = 30120,
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.refresh = 60,
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.xres = 800,
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.yres = 480,
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.hsync_len = 1,
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.left_margin = 215,
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.right_margin = 40,
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.vsync_len = 1,
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.upper_margin = 34,
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.lower_margin = 10,
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.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
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},
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};
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struct pxa168fb_mach_info aspenite_lcd_info = {
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.id = "Graphic Frame",
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.modes = video_modes,
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.num_modes = ARRAY_SIZE(video_modes),
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.pix_fmt = PIX_FMT_RGB565,
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.io_pin_allocation_mode = PIN_MODE_DUMB_24,
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.dumb_mode = DUMB_MODE_RGB888,
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.active = 1,
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.panel_rbswap = 0,
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.invert_pixclock = 0,
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};
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static unsigned int aspenite_matrix_key_map[] = {
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KEY(0, 6, KEY_UP), /* SW 4 */
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KEY(0, 7, KEY_DOWN), /* SW 5 */
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KEY(1, 6, KEY_LEFT), /* SW 6 */
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KEY(1, 7, KEY_RIGHT), /* SW 7 */
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KEY(4, 6, KEY_ENTER), /* SW 8 */
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KEY(4, 7, KEY_ESC), /* SW 9 */
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};
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static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = {
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.matrix_key_rows = 5,
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.matrix_key_cols = 8,
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.matrix_key_map = aspenite_matrix_key_map,
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.matrix_key_map_size = ARRAY_SIZE(aspenite_matrix_key_map),
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.debounce_interval = 30,
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};
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static void __init common_init(void)
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{
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mfp_config(ARRAY_AND_SIZE(common_pin_config));
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/* on-chip devices */
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pxa168_add_uart(1);
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pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info));
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pxa168_add_ssp(1);
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pxa168_add_nand(&aspenite_nand_info);
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pxa168_add_fb(&aspenite_lcd_info);
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pxa168_add_keypad(&aspenite_keypad_info);
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/* off-chip devices */
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platform_device_register(&smc91x_device);
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}
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MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
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.map_io = mmp_map_io,
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.nr_irqs = IRQ_BOARD_START,
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.init_irq = pxa168_init_irq,
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.timer = &pxa168_timer,
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.init_machine = common_init,
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MACHINE_END
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MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
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.map_io = mmp_map_io,
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.nr_irqs = IRQ_BOARD_START,
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.init_irq = pxa168_init_irq,
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.timer = &pxa168_timer,
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.init_machine = common_init,
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MACHINE_END
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