mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ec939e4c94
Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Olof Johansson:
"Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
soc: fsl: add RCPM driver
dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
memory: tegra: Consolidate registers definition into common header
memory: tegra: Ensure timing control debug features are disabled
memory: tegra: Introduce Tegra30 EMC driver
memory: tegra: Do not handle error from wait_for_completion_timeout()
memory: tegra: Increase handshake timeout on Tegra20
memory: tegra: Print a brief info message about EMC timings
memory: tegra: Pre-configure debug register on Tegra20
memory: tegra: Include io.h instead of iopoll.h
memory: tegra: Adapt for Tegra20 clock driver changes
memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
memory: tegra: Add gr2d and gr3d to DRM IOMMU group
memory: tegra: Set DMA mask based on supported address bits
soc: at91: Add Atmel SFR SN (Serial Number) support
memory: atmel-ebi: switch to SPDX license identifiers
memory: atmel-ebi: move NUM_CS definition inside EBI driver
soc: mediatek: Refactor bus protection control
soc: mediatek: Refactor sram control
...
93 lines
3.1 KiB
C
93 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _LINUX_RESET_CONTROLLER_H_
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#define _LINUX_RESET_CONTROLLER_H_
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#include <linux/list.h>
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struct reset_controller_dev;
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/**
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* struct reset_control_ops - reset controller driver callbacks
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*
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* @reset: for self-deasserting resets, does all necessary
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* things to reset the device
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* @assert: manually assert the reset line, if supported
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* @deassert: manually deassert the reset line, if supported
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* @status: return the status of the reset line, if supported
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*/
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struct reset_control_ops {
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int (*reset)(struct reset_controller_dev *rcdev, unsigned long id);
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int (*assert)(struct reset_controller_dev *rcdev, unsigned long id);
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int (*deassert)(struct reset_controller_dev *rcdev, unsigned long id);
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int (*status)(struct reset_controller_dev *rcdev, unsigned long id);
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};
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struct module;
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struct device_node;
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struct of_phandle_args;
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/**
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* struct reset_control_lookup - represents a single lookup entry
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*
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* @list: internal list of all reset lookup entries
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* @provider: name of the reset controller device controlling this reset line
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* @index: ID of the reset controller in the reset controller device
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* @dev_id: name of the device associated with this reset line
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* @con_id: name of the reset line (can be NULL)
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*/
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struct reset_control_lookup {
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struct list_head list;
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const char *provider;
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unsigned int index;
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const char *dev_id;
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const char *con_id;
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};
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#define RESET_LOOKUP(_provider, _index, _dev_id, _con_id) \
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{ \
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.provider = _provider, \
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.index = _index, \
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.dev_id = _dev_id, \
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.con_id = _con_id, \
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}
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/**
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* struct reset_controller_dev - reset controller entity that might
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* provide multiple reset controls
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* @ops: a pointer to device specific struct reset_control_ops
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* @owner: kernel module of the reset controller driver
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* @list: internal list of reset controller devices
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* @reset_control_head: head of internal list of requested reset controls
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* @dev: corresponding driver model device struct
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* @of_node: corresponding device tree node as phandle target
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* @of_reset_n_cells: number of cells in reset line specifiers
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* @of_xlate: translation function to translate from specifier as found in the
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* device tree to id as given to the reset control ops, defaults
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* to :c:func:`of_reset_simple_xlate`.
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* @nr_resets: number of reset controls in this reset controller device
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*/
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struct reset_controller_dev {
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const struct reset_control_ops *ops;
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struct module *owner;
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struct list_head list;
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struct list_head reset_control_head;
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struct device *dev;
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struct device_node *of_node;
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int of_reset_n_cells;
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int (*of_xlate)(struct reset_controller_dev *rcdev,
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const struct of_phandle_args *reset_spec);
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unsigned int nr_resets;
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};
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int reset_controller_register(struct reset_controller_dev *rcdev);
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void reset_controller_unregister(struct reset_controller_dev *rcdev);
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struct device;
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int devm_reset_controller_register(struct device *dev,
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struct reset_controller_dev *rcdev);
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void reset_controller_add_lookup(struct reset_control_lookup *lookup,
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unsigned int num_entries);
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#endif
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