mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
fae210bb5b
Document APMU and SMP enable method for RZ/G1N (R8A7744) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
36 lines
1.1 KiB
Plaintext
36 lines
1.1 KiB
Plaintext
DT bindings for the Renesas Advanced Power Management Unit
|
|
|
|
Renesas R-Car and RZ/G1 SoCs utilize one or more APMU hardware units
|
|
for CPU core power domain control including SMP boot and CPU Hotplug.
|
|
|
|
Required properties:
|
|
|
|
- compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.
|
|
Examples with soctypes are:
|
|
- "renesas,r8a7743-apmu" (RZ/G1M)
|
|
- "renesas,r8a7744-apmu" (RZ/G1N)
|
|
- "renesas,r8a7745-apmu" (RZ/G1E)
|
|
- "renesas,r8a77470-apmu" (RZ/G1C)
|
|
- "renesas,r8a7790-apmu" (R-Car H2)
|
|
- "renesas,r8a7791-apmu" (R-Car M2-W)
|
|
- "renesas,r8a7792-apmu" (R-Car V2H)
|
|
- "renesas,r8a7793-apmu" (R-Car M2-N)
|
|
- "renesas,r8a7794-apmu" (R-Car E2)
|
|
|
|
- reg: Base address and length of the I/O registers used by the APMU.
|
|
|
|
- cpus: This node contains a list of CPU cores, which should match the order
|
|
of CPU cores used by the WUPCR and PSTR registers in the Advanced Power
|
|
Management Unit section of the device's datasheet.
|
|
|
|
|
|
Example:
|
|
|
|
This shows the r8a7791 APMU that can control CPU0 and CPU1.
|
|
|
|
apmu@e6152000 {
|
|
compatible = "renesas,r8a7791-apmu", "renesas,apmu";
|
|
reg = <0 0xe6152000 0 0x188>;
|
|
cpus = <&cpu0 &cpu1>;
|
|
};
|