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f26b9343f5
Components belonging to the same pipeline often requires synchronized clocks. Such clocks are sometimes provided by external clock controller, but they can be also provided by pipeline components. In latter case there should be a way to access them from another component belonging to the same pipeline. This is the case of: - DECON,FIMD -> HDMI and HDMI-PHY clock, - FIMD -> DP and DP clock in FIMD. The latter case has been solved by clock_enable callback in exynos_drm_crtc_ops. This solutin will not work with HDMI path as in this case clock is provided by encoder. This patch provides more generic solution allowing to register pipeline clock during initialization in exynos_drm_crtc structure. This way the clock will be easily accessible from both components. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> |
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| ipu-v3 | ||
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| Makefile | ||