mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 10:39:23 +07:00
b72af445cd
Some Vivante GPUs are found in systems that have interconnects restricted to 32 address bits, but may have system memory mapped above the 4GB mark. As this region isn't accessible to the GPU via DMA any GPU memory allocated in the upper part needs to go through SWIOTLB bounce buffering. This kills performance if it happens too often, as well as overrunning the available bounce buffer space, as the GPU buffer may stay mapped for a long time. Avoid bounce buffering by checking the addressing restrictions. If the GPU is unable to access memory above the 4GB mark, request our SHM buffers to be located in the DMA32 zone. Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
130 lines
4.3 KiB
C
130 lines
4.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2015-2018 Etnaviv Project
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*/
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#ifndef __ETNAVIV_DRV_H__
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#define __ETNAVIV_DRV_H__
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#include <linux/list.h>
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#include <linux/mm_types.h>
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#include <linux/sizes.h>
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#include <linux/time64.h>
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#include <linux/types.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_gem.h>
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#include <drm/etnaviv_drm.h>
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#include <drm/gpu_scheduler.h>
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struct etnaviv_cmdbuf;
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struct etnaviv_gpu;
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struct etnaviv_mmu;
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struct etnaviv_gem_object;
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struct etnaviv_gem_submit;
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struct etnaviv_iommu_global;
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#define ETNAVIV_SOFTPIN_START_ADDRESS SZ_4M /* must be >= SUBALLOC_SIZE */
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struct etnaviv_file_private {
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struct etnaviv_iommu_context *mmu;
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struct drm_sched_entity sched_entity[ETNA_MAX_PIPES];
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};
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struct etnaviv_drm_private {
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int num_gpus;
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struct device_dma_parameters dma_parms;
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struct etnaviv_gpu *gpu[ETNA_MAX_PIPES];
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gfp_t shm_gfp_mask;
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struct etnaviv_cmdbuf_suballoc *cmdbuf_suballoc;
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struct etnaviv_iommu_global *mmu_global;
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/* list of GEM objects: */
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struct mutex gem_lock;
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struct list_head gem_list;
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};
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int etnaviv_ioctl_gem_submit(struct drm_device *dev, void *data,
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struct drm_file *file);
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int etnaviv_gem_mmap(struct file *filp, struct vm_area_struct *vma);
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vm_fault_t etnaviv_gem_fault(struct vm_fault *vmf);
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int etnaviv_gem_mmap_offset(struct drm_gem_object *obj, u64 *offset);
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struct sg_table *etnaviv_gem_prime_get_sg_table(struct drm_gem_object *obj);
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void *etnaviv_gem_prime_vmap(struct drm_gem_object *obj);
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void etnaviv_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
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int etnaviv_gem_prime_mmap(struct drm_gem_object *obj,
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struct vm_area_struct *vma);
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struct drm_gem_object *etnaviv_gem_prime_import_sg_table(struct drm_device *dev,
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struct dma_buf_attachment *attach, struct sg_table *sg);
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int etnaviv_gem_prime_pin(struct drm_gem_object *obj);
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void etnaviv_gem_prime_unpin(struct drm_gem_object *obj);
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void *etnaviv_gem_vmap(struct drm_gem_object *obj);
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int etnaviv_gem_cpu_prep(struct drm_gem_object *obj, u32 op,
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struct drm_etnaviv_timespec *timeout);
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int etnaviv_gem_cpu_fini(struct drm_gem_object *obj);
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void etnaviv_gem_free_object(struct drm_gem_object *obj);
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int etnaviv_gem_new_handle(struct drm_device *dev, struct drm_file *file,
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u32 size, u32 flags, u32 *handle);
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int etnaviv_gem_new_userptr(struct drm_device *dev, struct drm_file *file,
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uintptr_t ptr, u32 size, u32 flags, u32 *handle);
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u16 etnaviv_buffer_init(struct etnaviv_gpu *gpu);
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u16 etnaviv_buffer_config_mmuv2(struct etnaviv_gpu *gpu, u32 mtlb_addr, u32 safe_addr);
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u16 etnaviv_buffer_config_pta(struct etnaviv_gpu *gpu, unsigned short id);
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void etnaviv_buffer_end(struct etnaviv_gpu *gpu);
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void etnaviv_sync_point_queue(struct etnaviv_gpu *gpu, unsigned int event);
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void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state,
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struct etnaviv_iommu_context *mmu,
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unsigned int event, struct etnaviv_cmdbuf *cmdbuf);
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void etnaviv_validate_init(void);
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bool etnaviv_cmd_validate_one(struct etnaviv_gpu *gpu,
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u32 *stream, unsigned int size,
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struct drm_etnaviv_gem_submit_reloc *relocs, unsigned int reloc_size);
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#ifdef CONFIG_DEBUG_FS
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void etnaviv_gem_describe_objects(struct etnaviv_drm_private *priv,
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struct seq_file *m);
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#endif
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#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
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#define VERB(fmt, ...) if (0) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
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/*
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* Return the storage size of a structure with a variable length array.
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* The array is nelem elements of elem_size, where the base structure
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* is defined by base. If the size overflows size_t, return zero.
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*/
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static inline size_t size_vstruct(size_t nelem, size_t elem_size, size_t base)
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{
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if (elem_size && nelem > (SIZE_MAX - base) / elem_size)
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return 0;
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return base + nelem * elem_size;
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}
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/*
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* Etnaviv timeouts are specified wrt CLOCK_MONOTONIC, not jiffies.
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* We need to calculate the timeout in terms of number of jiffies
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* between the specified timeout and the current CLOCK_MONOTONIC time.
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*/
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static inline unsigned long etnaviv_timeout_to_jiffies(
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const struct drm_etnaviv_timespec *timeout)
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{
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struct timespec64 ts, to = {
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.tv_sec = timeout->tv_sec,
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.tv_nsec = timeout->tv_nsec,
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};
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ktime_get_ts64(&ts);
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/* timeouts before "now" have already expired */
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if (timespec64_compare(&to, &ts) <= 0)
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return 0;
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ts = timespec64_sub(to, ts);
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return timespec64_to_jiffies(&ts);
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}
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#endif /* __ETNAVIV_DRV_H__ */
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