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f227d4306c
Currently, the APIC LVT interrupt for error thresholding is implicitly enabled. However, there are models in the F15h range which do not enable it. Make the code machinery which sets up the APIC interrupt support an optional setting and add an ->interrupt_capable member to the bank representation mirroring that capability and enable the interrupt offset programming only if it is true. Simplify code and fixup comment style while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> |
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.. | ||
Makefile | ||
mce_amd.c | ||
mce_intel.c | ||
mce-apei.c | ||
mce-inject.c | ||
mce-internal.h | ||
mce-severity.c | ||
mce.c | ||
p5.c | ||
therm_throt.c | ||
threshold.c | ||
winchip.c |