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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7fa12181b0
1. GICv3 support on Foundation models 2. Support for Juno R2 board 3. Support for ARM HDLCD on all Juno platforms -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJWuxfzAAoJEABBurwxfuKYF3cP/0rJX1WsVPtJZthVoA0+elTp ruRl2vnzxnlrGG93dpWH3HKx4o56En9AIwKHacHkVKcfoSsC3YSTFS3KD34eweFy GYJQxtK+eEXZnR3zxbDpyaj2bo/VqFHULB1o8WXJWSs5IAhS4eKeWLoDe/38AsV7 GXKjoL7Gxi3znS+fZObUwBKrLSUGEgEMJp4I0tX7T1GE0sCPg5aW+ApoHfD4HYC6 LgKaRuKfaJNrjDETIQ2TqSUuwJobT/xoYjSGPr2cMthBfPUvACXu7+fBFwpfmHct EAmNnxBI6f3RuuDuxCFATIMfPPOrEslyFCYBcWhwOtl0r1Y6rq+J/P9AYB3xRqYG KzYN33Wo87wwn8y0TULXkRrs9s0WddtulgmH/IrSKby7w7U4sCGmMcNv37kjCRGJ oKsSKSAag3g7kBAJEFP4X7tMwG2tl4koUmWvyZO2ihsXt1tHUYQcBLzUdw1N/pNk hkQjOr1BRLgEYh451QdBDzcV+QBTgDe3DaG6WpI6RNFuGnKYsqaCyh5qiZGCbvD4 7dGquR+EBakaEEKjzVIqTva77SB0ZwVAsNgPbgXK0ibqfGuWSQq58GqwWh4Nv0cf Xzfihicwsak6swohmn6n5/u3gywekOsoHd1OVrb24cfFHLXcqaLOz7Rs+sFZp93v bxHKj68IUAhzU+awmPB9 =r0q6 -----END PGP SIGNATURE----- Merge tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt Few updates for ARM VExpress/Juno platforms 1. GICv3 support on Foundation models 2. Support for Juno R2 board 3. Support for ARM HDLCD on all Juno platforms * tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: Add HDLCD support on Juno platforms Documentation: drm: Add DT bindings for ARM HDLCD arm64: dts: Add support for Juno r2 board arm64: dts: move juno pcie-controller to base file arm64: dts: add .dts for GICv3 Foundation model arm64: dts: split Foundation model dts to put the GIC separately arm64: dts: Foundation model: increase GICC region to allow EOImode=1 arm64: dts: prepare foundation-v8.dts to cope with GICv3 Signed-off-by: Olof Johansson <olof@lixom.net>
275 lines
7.2 KiB
Plaintext
275 lines
7.2 KiB
Plaintext
/*
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* Devices shared by all Juno boards
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*/
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memtimer: timer@2a810000 {
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compatible = "arm,armv7-timer-mem";
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reg = <0x0 0x2a810000 0x0 0x10000>;
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clock-frequency = <50000000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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status = "disabled";
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frame@2a830000 {
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frame-number = <1>;
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interrupts = <0 60 4>;
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reg = <0x0 0x2a830000 0x0 0x10000>;
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};
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};
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mailbox: mhu@2b1f0000 {
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compatible = "arm,mhu", "arm,primecell";
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reg = <0x0 0x2b1f0000 0x0 0x1000>;
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interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "mhu_lpri_rx",
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"mhu_hpri_rx";
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#mbox-cells = <1>;
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clocks = <&soc_refclk100mhz>;
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clock-names = "apb_pclk";
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};
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gic: interrupt-controller@2c010000 {
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compatible = "arm,gic-400", "arm,cortex-a15-gic";
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reg = <0x0 0x2c010000 0 0x1000>,
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<0x0 0x2c02f000 0 0x2000>,
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<0x0 0x2c04f000 0 0x2000>,
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<0x0 0x2c06f000 0 0x2000>;
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#address-cells = <2>;
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#interrupt-cells = <3>;
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#size-cells = <2>;
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interrupt-controller;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
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ranges = <0 0 0 0x2c1c0000 0 0x40000>;
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v2m_0: v2m@0 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0 0 0 0x1000>;
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
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};
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sram: sram@2e000000 {
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compatible = "arm,juno-sram-ns", "mmio-sram";
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reg = <0x0 0x2e000000 0x0 0x8000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x0 0x2e000000 0x8000>;
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cpu_scp_lpri: scp-shmem@0 {
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compatible = "arm,juno-scp-shmem";
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reg = <0x0 0x200>;
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};
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cpu_scp_hpri: scp-shmem@200 {
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compatible = "arm,juno-scp-shmem";
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reg = <0x200 0x200>;
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};
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};
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pcie_ctlr: pcie-controller@40000000 {
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compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic";
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device_type = "pci";
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reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */
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bus-range = <0 255>;
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linux,pci-domain = <0>;
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#address-cells = <3>;
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#size-cells = <2>;
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dma-coherent;
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ranges = <0x01000000 0x00 0x5f800000 0x00 0x5f800000 0x0 0x00800000>,
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<0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
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<0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &gic 0 0 0 136 4>,
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<0 0 0 2 &gic 0 0 0 137 4>,
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<0 0 0 3 &gic 0 0 0 138 4>,
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<0 0 0 4 &gic 0 0 0 139 4>;
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msi-parent = <&v2m_0>;
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status = "disabled";
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};
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scpi {
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compatible = "arm,scpi";
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mboxes = <&mailbox 1>;
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shmem = <&cpu_scp_hpri>;
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clocks {
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compatible = "arm,scpi-clocks";
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scpi_dvfs: scpi_clocks@0 {
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compatible = "arm,scpi-dvfs-clocks";
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#clock-cells = <1>;
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clock-indices = <0>, <1>, <2>;
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clock-output-names = "atlclk", "aplclk","gpuclk";
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};
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scpi_clk: scpi_clocks@3 {
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compatible = "arm,scpi-variable-clocks";
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#clock-cells = <1>;
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clock-indices = <3>;
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clock-output-names = "pxlclk";
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};
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};
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scpi_sensors0: sensors {
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compatible = "arm,scpi-sensors";
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#thermal-sensor-cells = <1>;
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};
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};
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/include/ "juno-clocks.dtsi"
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dma@7ff00000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x0 0x7ff00000 0 0x1000>;
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#dma-cells = <1>;
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#dma-channels = <8>;
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#dma-requests = <32>;
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interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&soc_faxiclk>;
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clock-names = "apb_pclk";
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};
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hdlcd@7ff50000 {
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compatible = "arm,hdlcd";
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reg = <0 0x7ff50000 0 0x1000>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&scpi_clk 3>;
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clock-names = "pxlclk";
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port {
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hdlcd1_output: endpoint@0 {
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remote-endpoint = <&tda998x_1_input>;
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};
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};
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};
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hdlcd@7ff60000 {
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compatible = "arm,hdlcd";
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reg = <0 0x7ff60000 0 0x1000>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&scpi_clk 3>;
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clock-names = "pxlclk";
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port {
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hdlcd0_output: endpoint@0 {
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remote-endpoint = <&tda998x_0_input>;
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};
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};
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};
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soc_uart0: uart@7ff80000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0 0x7ff80000 0x0 0x1000>;
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&soc_uartclk>, <&soc_refclk100mhz>;
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clock-names = "uartclk", "apb_pclk";
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};
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i2c@7ffa0000 {
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compatible = "snps,designware-i2c";
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reg = <0x0 0x7ffa0000 0x0 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <400000>;
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i2c-sda-hold-time-ns = <500>;
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clocks = <&soc_smc50mhz>;
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hdmi-transmitter@70 {
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compatible = "nxp,tda998x";
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reg = <0x70>;
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port {
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tda998x_0_input: endpoint@0 {
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remote-endpoint = <&hdlcd0_output>;
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};
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};
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};
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hdmi-transmitter@71 {
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compatible = "nxp,tda998x";
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reg = <0x71>;
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port {
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tda998x_1_input: endpoint@0 {
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remote-endpoint = <&hdlcd1_output>;
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};
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};
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};
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};
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ohci@7ffb0000 {
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compatible = "generic-ohci";
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reg = <0x0 0x7ffb0000 0x0 0x10000>;
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interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&soc_usb48mhz>;
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};
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ehci@7ffc0000 {
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compatible = "generic-ehci";
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reg = <0x0 0x7ffc0000 0x0 0x10000>;
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interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&soc_usb48mhz>;
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};
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memory-controller@7ffd0000 {
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compatible = "arm,pl354", "arm,primecell";
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reg = <0 0x7ffd0000 0 0x1000>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&soc_smc50mhz>;
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clock-names = "apb_pclk";
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};
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memory@80000000 {
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device_type = "memory";
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/* last 16MB of the first memory area is reserved for secure world use by firmware */
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reg = <0x00000000 0x80000000 0x0 0x7f000000>,
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<0x00000008 0x80000000 0x1 0x80000000>;
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};
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smb {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0 0x08000000 0x04000000>,
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<1 0 0 0x14000000 0x04000000>,
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<2 0 0 0x18000000 0x04000000>,
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<3 0 0 0x1c000000 0x04000000>,
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<4 0 0 0x0c000000 0x04000000>,
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<5 0 0 0x10000000 0x04000000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 15>;
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interrupt-map = <0 0 0 &gic 0 0 0 68 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 1 &gic 0 0 0 69 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 2 &gic 0 0 0 70 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 3 &gic 0 0 0 160 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 4 &gic 0 0 0 161 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 5 &gic 0 0 0 162 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 6 &gic 0 0 0 163 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 7 &gic 0 0 0 164 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 8 &gic 0 0 0 165 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 9 &gic 0 0 0 166 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 10 &gic 0 0 0 167 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 11 &gic 0 0 0 168 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 12 &gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH>;
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/include/ "juno-motherboard.dtsi"
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};
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