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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
157 lines
4.2 KiB
ArmAsm
157 lines
4.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* AMD Memory Encryption Support
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*
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* Copyright (C) 2016 Advanced Micro Devices, Inc.
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*
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* Author: Tom Lendacky <thomas.lendacky@amd.com>
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*/
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#include <linux/linkage.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/processor-flags.h>
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#include <asm/msr-index.h>
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#include <asm/nospec-branch.h>
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.text
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.code64
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ENTRY(sme_encrypt_execute)
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/*
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* Entry parameters:
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* RDI - virtual address for the encrypted mapping
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* RSI - virtual address for the decrypted mapping
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* RDX - length to encrypt
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* RCX - virtual address of the encryption workarea, including:
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* - stack page (PAGE_SIZE)
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* - encryption routine page (PAGE_SIZE)
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* - intermediate copy buffer (PMD_PAGE_SIZE)
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* R8 - physcial address of the pagetables to use for encryption
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*/
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push %rbp
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movq %rsp, %rbp /* RBP now has original stack pointer */
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/* Set up a one page stack in the non-encrypted memory area */
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movq %rcx, %rax /* Workarea stack page */
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leaq PAGE_SIZE(%rax), %rsp /* Set new stack pointer */
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addq $PAGE_SIZE, %rax /* Workarea encryption routine */
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push %r12
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movq %rdi, %r10 /* Encrypted area */
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movq %rsi, %r11 /* Decrypted area */
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movq %rdx, %r12 /* Area length */
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/* Copy encryption routine into the workarea */
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movq %rax, %rdi /* Workarea encryption routine */
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leaq __enc_copy(%rip), %rsi /* Encryption routine */
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movq $(.L__enc_copy_end - __enc_copy), %rcx /* Encryption routine length */
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rep movsb
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/* Setup registers for call */
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movq %r10, %rdi /* Encrypted area */
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movq %r11, %rsi /* Decrypted area */
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movq %r8, %rdx /* Pagetables used for encryption */
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movq %r12, %rcx /* Area length */
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movq %rax, %r8 /* Workarea encryption routine */
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addq $PAGE_SIZE, %r8 /* Workarea intermediate copy buffer */
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ANNOTATE_RETPOLINE_SAFE
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call *%rax /* Call the encryption routine */
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pop %r12
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movq %rbp, %rsp /* Restore original stack pointer */
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pop %rbp
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ret
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ENDPROC(sme_encrypt_execute)
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ENTRY(__enc_copy)
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/*
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* Routine used to encrypt memory in place.
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* This routine must be run outside of the kernel proper since
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* the kernel will be encrypted during the process. So this
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* routine is defined here and then copied to an area outside
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* of the kernel where it will remain and run decrypted
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* during execution.
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*
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* On entry the registers must be:
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* RDI - virtual address for the encrypted mapping
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* RSI - virtual address for the decrypted mapping
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* RDX - address of the pagetables to use for encryption
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* RCX - length of area
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* R8 - intermediate copy buffer
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*
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* RAX - points to this routine
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*
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* The area will be encrypted by copying from the non-encrypted
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* memory space to an intermediate buffer and then copying from the
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* intermediate buffer back to the encrypted memory space. The physical
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* addresses of the two mappings are the same which results in the area
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* being encrypted "in place".
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*/
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/* Enable the new page tables */
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mov %rdx, %cr3
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/* Flush any global TLBs */
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mov %cr4, %rdx
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andq $~X86_CR4_PGE, %rdx
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mov %rdx, %cr4
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orq $X86_CR4_PGE, %rdx
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mov %rdx, %cr4
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push %r15
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push %r12
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movq %rcx, %r9 /* Save area length */
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movq %rdi, %r10 /* Save encrypted area address */
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movq %rsi, %r11 /* Save decrypted area address */
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/* Set the PAT register PA5 entry to write-protect */
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movl $MSR_IA32_CR_PAT, %ecx
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rdmsr
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mov %rdx, %r15 /* Save original PAT value */
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andl $0xffff00ff, %edx /* Clear PA5 */
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orl $0x00000500, %edx /* Set PA5 to WP */
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wrmsr
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wbinvd /* Invalidate any cache entries */
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/* Copy/encrypt up to 2MB at a time */
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movq $PMD_PAGE_SIZE, %r12
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1:
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cmpq %r12, %r9
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jnb 2f
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movq %r9, %r12
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2:
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movq %r11, %rsi /* Source - decrypted area */
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movq %r8, %rdi /* Dest - intermediate copy buffer */
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movq %r12, %rcx
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rep movsb
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movq %r8, %rsi /* Source - intermediate copy buffer */
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movq %r10, %rdi /* Dest - encrypted area */
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movq %r12, %rcx
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rep movsb
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addq %r12, %r11
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addq %r12, %r10
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subq %r12, %r9 /* Kernel length decrement */
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jnz 1b /* Kernel length not zero? */
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/* Restore PAT register */
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movl $MSR_IA32_CR_PAT, %ecx
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rdmsr
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mov %r15, %rdx /* Restore original PAT value */
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wrmsr
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pop %r12
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pop %r15
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ret
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.L__enc_copy_end:
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ENDPROC(__enc_copy)
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