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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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08344f3b43
This is a collection of a few late fixes and other misc. stuff that had dependencies on things being merged from other trees. The Renesas R-Car power domain handling, and the Nvidia Tegra USB support both hand notable changes that required changing the DT binding in a way that only provides compatibility with old DT blobs on new kernels but not vice versa. As a consequence, the DT changes are based on top of the driver changes and are now in this branch. For NXP i.MX and Samsung Exynos, the changes in here depend on other changes that got merged through the clk maintainer tree. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAV0Sse2CrR//JCVInAQJoOg//VQwAUxayKGfYVzhJjhHdYbVA9kWYczHb wizFbF51XPylQzfGgHxEZJgdO3y2Ks54J7xaCK7oSUPEBT0rHsLQunHhq0aVQpew 1c06vEysYMkRclG7C0zN7i4gwdig+L4r6kUguTvb+nyJS3RISg0LaSoANVU65dQ5 +g4DLRrX1QlZPBXR8Fc/S1gTFXU+dO1S0oJFnK9ZZTgmsGg4GA0qC60hdsv+WeSv uzS4FJoxSy9MzoAFqmnWIa4jBV9I1Rg5vi7dfoBbTW1XOAMpq+GVLLU+Lvso0Jqw xWjBSmPl6l/cZ7BhpzWq8knKOsEezh5LLrVRXViVCGfTIFdlObxyHzeKcJp25V1p mL98MBXobn9Rly9hJxyzpeNWITZ6qJYR+IQy3Lsuk5KrdZG2f4uTErtoqmYRI3Pn vuXoi13NUeoCrHZJZ+fNUGwx5a5/hgUQXP5u+98uucQSqIVxe0cGnQVnFm84X81r Sj/dXxFlFBZfqfE8rf1cFd+YEbKtpF13vEURAQWrnEzBmJSTu7Cp8qdA5hX5CeK4 DW9bsu5hkWwnzoC2Ox/ZQVms4aI3q8s2xuu28GEJJdCE2IUiSnag/5vhGBzd4dTm 9R69RhE9y4EOhw+0z1O0LfoKoo6YyUQa+OUNVIwEfFjcCdZiMQIdZWi2PLv4jeAR jBBbpcWtHLo= =I0Be -----END PGP SIGNATURE----- Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late DT updates from Arnd Bergmann: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. The Renesas R-Car power domain handling, and the Nvidia Tegra USB support both hand notable changes that required changing the DT binding in a way that only provides compatibility with old DT blobs on new kernels but not vice versa. As a consequence, the DT changes are based on top of the driver changes and are now in this branch. For NXP i.MX and Samsung Exynos, the changes in here depend on other changes that got merged through the clk maintainer tree" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits) ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoC ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3 ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3 ARM: dts: exynos: Add support of bus frequency using VDD_INT for exynos3250-rinato ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250 ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monk ARM: dts: exynos: Add DMC bus node for Exynos3250 ARM: tegra: Enable XUSB on Nyan ARM: tegra: Enable XUSB on Jetson TK1 ARM: tegra: Enable XUSB on Venice2 ARM: tegra: Add Tegra124 XUSB controller ARM: tegra: Move Tegra124 to the new XUSB pad controller binding ARM: dts: r8a7794: Use SYSC "always-on" PM Domain ARM: dts: r8a7793: Use SYSC "always-on" PM Domain ...
1297 lines
29 KiB
Plaintext
1297 lines
29 KiB
Plaintext
/*
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* Samsung's Exynos4412 based Trats 2 board device tree source
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*
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* Copyright (c) 2013 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Device tree source file for Samsung's Trats 2 board which is based on
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* Samsung's Exynos4412 SoC.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "exynos4412.dtsi"
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#include "exynos4412-ppmu-common.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/maxim,max77686.h>
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/ {
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model = "Samsung Trats 2 based on Exynos4412";
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compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4";
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aliases {
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i2c9 = &i2c_ak8975;
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i2c10 = &i2c_cm36651;
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i2c11 = &i2c_max77693;
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i2c12 = &i2c_max77693_fuel;
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};
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memory {
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reg = <0x40000000 0x40000000>;
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};
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chosen {
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bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
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stdout-path = &serial_2;
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};
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firmware@0204F000 {
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compatible = "samsung,secure-firmware";
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reg = <0x0204F000 0x1000>;
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};
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fixed-rate-clocks {
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xxti {
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compatible = "samsung,clock-xxti", "fixed-clock";
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clock-frequency = <0>;
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};
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xusbxti {
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compatible = "samsung,clock-xusbxti", "fixed-clock";
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clock-frequency = <24000000>;
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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cam_io_reg: voltage-regulator-1 {
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compatible = "regulator-fixed";
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regulator-name = "CAM_SENSOR_A";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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gpio = <&gpm0 2 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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lcd_vdd3_reg: voltage-regulator-2 {
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compatible = "regulator-fixed";
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regulator-name = "LCD_VDD_2.2V";
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regulator-min-microvolt = <2200000>;
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regulator-max-microvolt = <2200000>;
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gpio = <&gpc0 1 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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cam_af_reg: voltage-regulator-3 {
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compatible = "regulator-fixed";
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regulator-name = "CAM_AF";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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gpio = <&gpm0 4 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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ps_als_reg: voltage-regulator-5 {
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compatible = "regulator-fixed";
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regulator-name = "LED_A_3.0V";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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gpio = <&gpj0 5 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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key-down {
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gpios = <&gpx3 3 GPIO_ACTIVE_LOW>;
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linux,code = <114>;
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label = "volume down";
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debounce-interval = <10>;
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};
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key-up {
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gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
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linux,code = <115>;
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label = "volume up";
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debounce-interval = <10>;
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};
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key-power {
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gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
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linux,code = <116>;
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label = "power";
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debounce-interval = <10>;
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wakeup-source;
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};
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key-ok {
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gpios = <&gpx0 1 GPIO_ACTIVE_LOW>;
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linux,code = <139>;
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label = "ok";
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debounce-inteval = <10>;
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wakeup-source;
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};
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};
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i2c_max77693: i2c-gpio-1 {
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compatible = "i2c-gpio";
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gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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max77693@66 {
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compatible = "maxim,max77693";
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interrupt-parent = <&gpx1>;
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interrupts = <5 2>;
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reg = <0x66>;
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regulators {
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esafeout1_reg: ESAFEOUT1 {
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regulator-name = "ESAFEOUT1";
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};
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esafeout2_reg: ESAFEOUT2 {
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regulator-name = "ESAFEOUT2";
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};
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charger_reg: CHARGER {
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regulator-name = "CHARGER";
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regulator-min-microamp = <60000>;
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regulator-max-microamp = <2580000>;
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};
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};
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max77693_haptic {
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compatible = "maxim,max77693-haptic";
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haptic-supply = <&ldo26_reg>;
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pwms = <&pwm 0 38022 0>;
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};
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charger {
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compatible = "maxim,max77693-charger";
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maxim,constant-microvolt = <4350000>;
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maxim,min-system-microvolt = <3600000>;
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maxim,thermal-regulation-celsius = <100>;
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maxim,battery-overcurrent-microamp = <3500000>;
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maxim,charge-input-threshold-microvolt = <4300000>;
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};
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};
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};
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i2c_max77693_fuel: i2c-gpio-3 {
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compatible = "i2c-gpio";
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gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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max77693-fuel-gauge@36 {
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compatible = "maxim,max17047";
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interrupt-parent = <&gpx2>;
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interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
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reg = <0x36>;
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maxim,over-heat-temp = <700>;
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maxim,over-volt = <4500>;
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};
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};
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i2c_ak8975: i2c-gpio-0 {
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compatible = "i2c-gpio";
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gpios = <&gpy2 4 GPIO_ACTIVE_HIGH>, <&gpy2 5 GPIO_ACTIVE_HIGH>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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ak8975@0c {
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compatible = "asahi-kasei,ak8975";
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reg = <0x0c>;
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gpios = <&gpj0 7 GPIO_ACTIVE_HIGH>;
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};
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};
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i2c_cm36651: i2c-gpio-2 {
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compatible = "i2c-gpio";
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gpios = <&gpf0 0 GPIO_ACTIVE_LOW>, <&gpf0 1 GPIO_ACTIVE_LOW>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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cm36651@18 {
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compatible = "capella,cm36651";
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reg = <0x18>;
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interrupt-parent = <&gpx0>;
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interrupts = <2 2>;
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vled-supply = <&ps_als_reg>;
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};
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};
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camera: camera {
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pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
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pinctrl-names = "default";
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status = "okay";
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assigned-clocks = <&clock CLK_MOUT_CAM0>,
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<&clock CLK_MOUT_CAM1>;
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assigned-clock-parents = <&clock CLK_XUSBXTI>,
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<&clock CLK_XUSBXTI>;
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};
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sound {
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compatible = "samsung,trats2-audio";
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samsung,i2s-controller = <&i2s0>;
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samsung,model = "Trats2";
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samsung,audio-codec = <&wm1811>;
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samsung,audio-routing =
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"SPK", "SPKOUTLN",
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"SPK", "SPKOUTLP",
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"SPK", "SPKOUTRN",
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"SPK", "SPKOUTRP";
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};
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thermistor-ap {
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compatible = "ntc,ncp15wb473";
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pullup-uv = <1800000>; /* VCC_1.8V_AP */
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pullup-ohm = <100000>; /* 100K */
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pulldown-ohm = <100000>; /* 100K */
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io-channels = <&adc 1>; /* AP temperature */
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};
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thermistor-battery {
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compatible = "ntc,ncp15wb473";
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pullup-uv = <1800000>; /* VCC_1.8V_AP */
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pullup-ohm = <100000>; /* 100K */
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pulldown-ohm = <100000>; /* 100K */
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io-channels = <&adc 2>; /* Battery temperature */
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};
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thermal-zones {
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cpu_thermal: cpu-thermal {
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cooling-maps {
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map0 {
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/* Corresponds to 800MHz at freq_table */
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cooling-device = <&cpu0 7 7>;
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};
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map1 {
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/* Corresponds to 200MHz at freq_table */
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cooling-device = <&cpu0 13 13>;
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};
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};
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};
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};
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};
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&adc {
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vdd-supply = <&ldo3_reg>;
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status = "okay";
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};
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&bus_dmc {
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devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
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vdd-supply = <&buck1_reg>;
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status = "okay";
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};
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&bus_acp {
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devfreq = <&bus_dmc>;
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status = "okay";
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};
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&bus_c2c {
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devfreq = <&bus_dmc>;
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status = "okay";
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};
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&bus_leftbus {
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devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
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vdd-supply = <&buck3_reg>;
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status = "okay";
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};
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&bus_rightbus {
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devfreq = <&bus_leftbus>;
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status = "okay";
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};
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&bus_display {
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devfreq = <&bus_leftbus>;
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status = "okay";
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};
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&bus_fsys {
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devfreq = <&bus_leftbus>;
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status = "okay";
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};
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&bus_peri {
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devfreq = <&bus_leftbus>;
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status = "okay";
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};
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&bus_mfc {
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devfreq = <&bus_leftbus>;
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status = "okay";
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};
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&cpu0 {
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cpu0-supply = <&buck2_reg>;
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};
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&csis_0 {
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status = "okay";
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vddcore-supply = <&ldo8_reg>;
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vddio-supply = <&ldo10_reg>;
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assigned-clocks = <&clock CLK_MOUT_CSIS0>,
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<&clock CLK_SCLK_CSIS0>;
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assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
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assigned-clock-rates = <0>, <176000000>;
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/* Camera C (3) MIPI CSI-2 (CSIS0) */
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port@3 {
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reg = <3>;
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csis0_ep: endpoint {
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remote-endpoint = <&s5c73m3_ep>;
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data-lanes = <1 2 3 4>;
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samsung,csis-hs-settle = <12>;
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};
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};
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};
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&csis_1 {
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status = "okay";
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vddcore-supply = <&ldo8_reg>;
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vddio-supply = <&ldo10_reg>;
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assigned-clocks = <&clock CLK_MOUT_CSIS1>,
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<&clock CLK_SCLK_CSIS1>;
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assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
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assigned-clock-rates = <0>, <176000000>;
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/* Camera D (4) MIPI CSI-2 (CSIS1) */
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port@4 {
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reg = <4>;
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csis1_ep: endpoint {
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remote-endpoint = <&is_s5k6a3_ep>;
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data-lanes = <1>;
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samsung,csis-hs-settle = <18>;
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samsung,csis-wclk;
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};
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};
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};
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&dsi_0 {
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vddcore-supply = <&ldo8_reg>;
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vddio-supply = <&ldo10_reg>;
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samsung,pll-clock-frequency = <24000000>;
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi_out: endpoint {
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remote-endpoint = <&dsi_in>;
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samsung,burst-clock-frequency = <500000000>;
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samsung,esc-clock-frequency = <20000000>;
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};
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};
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};
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panel@0 {
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compatible = "samsung,s6e8aa0";
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reg = <0>;
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vdd3-supply = <&lcd_vdd3_reg>;
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vci-supply = <&ldo25_reg>;
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reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>;
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power-on-delay= <50>;
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reset-delay = <100>;
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init-delay = <100>;
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flip-horizontal;
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flip-vertical;
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panel-width-mm = <58>;
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panel-height-mm = <103>;
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display-timings {
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timing-0 {
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clock-frequency = <57153600>;
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hactive = <720>;
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vactive = <1280>;
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hfront-porch = <5>;
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hback-porch = <5>;
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hsync-len = <5>;
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vfront-porch = <13>;
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vback-porch = <1>;
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vsync-len = <2>;
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};
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};
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port {
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dsi_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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|
};
|
|
};
|
|
|
|
&exynos_usbphy {
|
|
vbus-supply = <&esafeout1_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&fimc_0 {
|
|
status = "okay";
|
|
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
|
|
<&clock CLK_SCLK_FIMC0>;
|
|
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
|
|
assigned-clock-rates = <0>, <176000000>;
|
|
};
|
|
|
|
&fimc_1 {
|
|
status = "okay";
|
|
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
|
|
<&clock CLK_SCLK_FIMC1>;
|
|
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
|
|
assigned-clock-rates = <0>, <176000000>;
|
|
};
|
|
|
|
&fimc_2 {
|
|
status = "okay";
|
|
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
|
|
<&clock CLK_SCLK_FIMC2>;
|
|
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
|
|
assigned-clock-rates = <0>, <176000000>;
|
|
};
|
|
|
|
&fimc_3 {
|
|
status = "okay";
|
|
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
|
|
<&clock CLK_SCLK_FIMC3>;
|
|
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
|
|
assigned-clock-rates = <0>, <176000000>;
|
|
};
|
|
|
|
&fimc_is {
|
|
pinctrl-0 = <&fimc_is_uart>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
i2c1_isp: i2c-isp@12140000 {
|
|
pinctrl-0 = <&fimc_is_i2c1>;
|
|
pinctrl-names = "default";
|
|
|
|
s5k6a3@10 {
|
|
compatible = "samsung,s5k6a3";
|
|
reg = <0x10>;
|
|
svdda-supply = <&cam_io_reg>;
|
|
svddio-supply = <&ldo19_reg>;
|
|
afvdd-supply = <&ldo19_reg>;
|
|
clock-frequency = <24000000>;
|
|
/* CAM_B_CLKOUT */
|
|
clocks = <&camera 1>;
|
|
clock-names = "extclk";
|
|
samsung,camclk-out = <1>;
|
|
gpios = <&gpm1 6 GPIO_ACTIVE_HIGH>;
|
|
|
|
port {
|
|
is_s5k6a3_ep: endpoint {
|
|
remote-endpoint = <&csis1_ep>;
|
|
data-lanes = <1>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&fimc_lite_0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&fimc_lite_1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&fimd {
|
|
status = "okay";
|
|
};
|
|
|
|
&hsotg {
|
|
vusb_d-supply = <&ldo15_reg>;
|
|
vusb_a-supply = <&ldo12_reg>;
|
|
dr_mode = "peripheral";
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c_0 {
|
|
samsung,i2c-sda-delay = <100>;
|
|
samsung,i2c-slave-addr = <0x10>;
|
|
samsung,i2c-max-bus-freq = <400000>;
|
|
pinctrl-0 = <&i2c0_bus>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
s5c73m3@3c {
|
|
compatible = "samsung,s5c73m3";
|
|
reg = <0x3c>;
|
|
standby-gpios = <&gpm0 1 GPIO_ACTIVE_LOW>; /* ISP_STANDBY */
|
|
xshutdown-gpios = <&gpf1 3 GPIO_ACTIVE_LOW>; /* ISP_RESET */
|
|
vdd-int-supply = <&buck9_reg>;
|
|
vddio-cis-supply = <&ldo9_reg>;
|
|
vdda-supply = <&ldo17_reg>;
|
|
vddio-host-supply = <&ldo18_reg>;
|
|
vdd-af-supply = <&cam_af_reg>;
|
|
vdd-reg-supply = <&cam_io_reg>;
|
|
clock-frequency = <24000000>;
|
|
/* CAM_A_CLKOUT */
|
|
clocks = <&camera 0>;
|
|
clock-names = "cis_extclk";
|
|
port {
|
|
s5c73m3_ep: endpoint {
|
|
remote-endpoint = <&csis0_ep>;
|
|
data-lanes = <1 2 3 4>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c_3 {
|
|
samsung,i2c-sda-delay = <100>;
|
|
samsung,i2c-slave-addr = <0x10>;
|
|
samsung,i2c-max-bus-freq = <400000>;
|
|
pinctrl-0 = <&i2c3_bus>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
mms114-touchscreen@48 {
|
|
compatible = "melfas,mms114";
|
|
reg = <0x48>;
|
|
interrupt-parent = <&gpm2>;
|
|
interrupts = <3 2>;
|
|
x-size = <720>;
|
|
y-size = <1280>;
|
|
avdd-supply = <&ldo23_reg>;
|
|
vdd-supply = <&ldo24_reg>;
|
|
};
|
|
};
|
|
|
|
&i2c_4 {
|
|
samsung,i2c-sda-delay = <100>;
|
|
samsung,i2c-slave-addr = <0x10>;
|
|
samsung,i2c-max-bus-freq = <100000>;
|
|
pinctrl-0 = <&i2c4_bus>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
wm1811: wm1811@1a {
|
|
compatible = "wlf,wm1811";
|
|
reg = <0x1a>;
|
|
clocks = <&pmu_system_controller 0>;
|
|
clock-names = "MCLK1";
|
|
DCVDD-supply = <&ldo3_reg>;
|
|
DBVDD1-supply = <&ldo3_reg>;
|
|
wlf,ldo1ena = <&gpj0 4 0>;
|
|
};
|
|
};
|
|
|
|
&i2c_7 {
|
|
samsung,i2c-sda-delay = <100>;
|
|
samsung,i2c-slave-addr = <0x10>;
|
|
samsung,i2c-max-bus-freq = <100000>;
|
|
pinctrl-0 = <&i2c7_bus>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
max77686: max77686_pmic@09 {
|
|
compatible = "maxim,max77686";
|
|
interrupt-parent = <&gpx0>;
|
|
interrupts = <7 0>;
|
|
reg = <0x09>;
|
|
#clock-cells = <1>;
|
|
|
|
voltage-regulators {
|
|
ldo1_reg: LDO1 {
|
|
regulator-name = "VALIVE_1.0V_AP";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo2_reg: LDO2 {
|
|
regulator-name = "VM1M2_1.2V_AP";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo3_reg: LDO3 {
|
|
regulator-name = "VCC_1.8V_AP";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo4_reg: LDO4 {
|
|
regulator-name = "VCC_2.8V_AP";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo5_reg: LDO5 {
|
|
regulator-name = "VCC_1.8V_IO";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo6_reg: LDO6 {
|
|
regulator-name = "VMPLL_1.0V_AP";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo7_reg: LDO7 {
|
|
regulator-name = "VPLL_1.0V_AP";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo8_reg: LDO8 {
|
|
regulator-name = "VMIPI_1.0V";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo9_reg: LDO9 {
|
|
regulator-name = "CAM_ISP_MIPI_1.2V";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
};
|
|
|
|
ldo10_reg: LDO10 {
|
|
regulator-name = "VMIPI_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo11_reg: LDO11 {
|
|
regulator-name = "VABB1_1.95V";
|
|
regulator-min-microvolt = <1950000>;
|
|
regulator-max-microvolt = <1950000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo12_reg: LDO12 {
|
|
regulator-name = "VUOTG_3.0V";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo13_reg: LDO13 {
|
|
regulator-name = "NFC_AVDD_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo14_reg: LDO14 {
|
|
regulator-name = "VABB2_1.95V";
|
|
regulator-min-microvolt = <1950000>;
|
|
regulator-max-microvolt = <1950000>;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo15_reg: LDO15 {
|
|
regulator-name = "VHSIC_1.0V";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo16_reg: LDO16 {
|
|
regulator-name = "VHSIC_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo17_reg: LDO17 {
|
|
regulator-name = "CAM_SENSOR_CORE_1.2V";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
};
|
|
|
|
ldo18_reg: LDO18 {
|
|
regulator-name = "CAM_ISP_SEN_IO_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo19_reg: LDO19 {
|
|
regulator-name = "VT_CAM_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo20_reg: LDO20 {
|
|
regulator-name = "VDDQ_PRE_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo21_reg: LDO21 {
|
|
regulator-name = "VTF_2.8V";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
ldo22_reg: LDO22 {
|
|
regulator-name = "VMEM_VDD_2.8V";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
ldo23_reg: LDO23 {
|
|
regulator-name = "TSP_AVDD_3.3V";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
ldo24_reg: LDO24 {
|
|
regulator-name = "TSP_VDD_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo25_reg: LDO25 {
|
|
regulator-name = "LCD_VCC_3.3V";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
ldo26_reg: LDO26 {
|
|
regulator-name = "MOTOR_VCC_3.0V";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
};
|
|
|
|
buck1_reg: BUCK1 {
|
|
regulator-name = "vdd_mif";
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <1100000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
buck2_reg: BUCK2 {
|
|
regulator-name = "vdd_arm";
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
buck3_reg: BUCK3 {
|
|
regulator-name = "vdd_int";
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <1150000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
buck4_reg: BUCK4 {
|
|
regulator-name = "vdd_g3d";
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <1150000>;
|
|
regulator-boot-on;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
buck5_reg: BUCK5 {
|
|
regulator-name = "VMEM_1.2V_AP";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck6_reg: BUCK6 {
|
|
regulator-name = "VCC_SUB_1.35V";
|
|
regulator-min-microvolt = <1350000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck7_reg: BUCK7 {
|
|
regulator-name = "VCC_SUB_2.0V";
|
|
regulator-min-microvolt = <2000000>;
|
|
regulator-max-microvolt = <2000000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck8_reg: BUCK8 {
|
|
regulator-name = "VMEM_VDDF_3.0V";
|
|
regulator-min-microvolt = <2850000>;
|
|
regulator-max-microvolt = <2850000>;
|
|
maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
buck9_reg: BUCK9 {
|
|
regulator-name = "CAM_ISP_CORE_1.2V";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2s0 {
|
|
pinctrl-0 = <&i2s0_bus>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
&mshc_0 {
|
|
num-slots = <1>;
|
|
broken-cd;
|
|
non-removable;
|
|
card-detect-delay = <200>;
|
|
vmmc-supply = <&ldo22_reg>;
|
|
clock-frequency = <400000000>;
|
|
samsung,dw-mshc-ciu-div = <0>;
|
|
samsung,dw-mshc-sdr-timing = <2 3>;
|
|
samsung,dw-mshc-ddr-timing = <1 2>;
|
|
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
bus-width = <8>;
|
|
cap-mmc-highspeed;
|
|
};
|
|
|
|
&pmu_system_controller {
|
|
assigned-clocks = <&pmu_system_controller 0>;
|
|
assigned-clock-parents = <&clock CLK_XUSBXTI>;
|
|
};
|
|
|
|
&pinctrl_0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sleep0>;
|
|
|
|
sleep0: sleep-states {
|
|
PIN_SLP(gpa0-0, INPUT, NONE);
|
|
PIN_SLP(gpa0-1, OUT0, NONE);
|
|
PIN_SLP(gpa0-2, INPUT, NONE);
|
|
PIN_SLP(gpa0-3, INPUT, UP);
|
|
PIN_SLP(gpa0-4, INPUT, NONE);
|
|
PIN_SLP(gpa0-5, INPUT, DOWN);
|
|
PIN_SLP(gpa0-6, INPUT, DOWN);
|
|
PIN_SLP(gpa0-7, INPUT, UP);
|
|
|
|
PIN_SLP(gpa1-0, INPUT, DOWN);
|
|
PIN_SLP(gpa1-1, INPUT, DOWN);
|
|
PIN_SLP(gpa1-2, INPUT, DOWN);
|
|
PIN_SLP(gpa1-3, INPUT, DOWN);
|
|
PIN_SLP(gpa1-4, INPUT, DOWN);
|
|
PIN_SLP(gpa1-5, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpb-0, INPUT, NONE);
|
|
PIN_SLP(gpb-1, INPUT, NONE);
|
|
PIN_SLP(gpb-2, INPUT, NONE);
|
|
PIN_SLP(gpb-3, INPUT, NONE);
|
|
PIN_SLP(gpb-4, INPUT, DOWN);
|
|
PIN_SLP(gpb-5, INPUT, UP);
|
|
PIN_SLP(gpb-6, INPUT, DOWN);
|
|
PIN_SLP(gpb-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpc0-0, INPUT, DOWN);
|
|
PIN_SLP(gpc0-1, INPUT, DOWN);
|
|
PIN_SLP(gpc0-2, INPUT, DOWN);
|
|
PIN_SLP(gpc0-3, INPUT, DOWN);
|
|
PIN_SLP(gpc0-4, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpc1-0, INPUT, NONE);
|
|
PIN_SLP(gpc1-1, PREV, NONE);
|
|
PIN_SLP(gpc1-2, INPUT, NONE);
|
|
PIN_SLP(gpc1-3, INPUT, NONE);
|
|
PIN_SLP(gpc1-4, INPUT, NONE);
|
|
|
|
PIN_SLP(gpd0-0, INPUT, DOWN);
|
|
PIN_SLP(gpd0-1, INPUT, DOWN);
|
|
PIN_SLP(gpd0-2, INPUT, NONE);
|
|
PIN_SLP(gpd0-3, INPUT, NONE);
|
|
|
|
PIN_SLP(gpd1-0, INPUT, DOWN);
|
|
PIN_SLP(gpd1-1, INPUT, DOWN);
|
|
PIN_SLP(gpd1-2, INPUT, NONE);
|
|
PIN_SLP(gpd1-3, INPUT, NONE);
|
|
|
|
PIN_SLP(gpf0-0, INPUT, NONE);
|
|
PIN_SLP(gpf0-1, INPUT, NONE);
|
|
PIN_SLP(gpf0-2, INPUT, DOWN);
|
|
PIN_SLP(gpf0-3, INPUT, DOWN);
|
|
PIN_SLP(gpf0-4, INPUT, NONE);
|
|
PIN_SLP(gpf0-5, INPUT, DOWN);
|
|
PIN_SLP(gpf0-6, INPUT, NONE);
|
|
PIN_SLP(gpf0-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpf1-0, INPUT, DOWN);
|
|
PIN_SLP(gpf1-1, INPUT, DOWN);
|
|
PIN_SLP(gpf1-2, INPUT, DOWN);
|
|
PIN_SLP(gpf1-3, INPUT, DOWN);
|
|
PIN_SLP(gpf1-4, INPUT, NONE);
|
|
PIN_SLP(gpf1-5, INPUT, NONE);
|
|
PIN_SLP(gpf1-6, INPUT, DOWN);
|
|
PIN_SLP(gpf1-7, PREV, NONE);
|
|
|
|
PIN_SLP(gpf2-0, PREV, NONE);
|
|
PIN_SLP(gpf2-1, INPUT, DOWN);
|
|
PIN_SLP(gpf2-2, INPUT, DOWN);
|
|
PIN_SLP(gpf2-3, INPUT, DOWN);
|
|
PIN_SLP(gpf2-4, INPUT, DOWN);
|
|
PIN_SLP(gpf2-5, INPUT, DOWN);
|
|
PIN_SLP(gpf2-6, INPUT, NONE);
|
|
PIN_SLP(gpf2-7, INPUT, NONE);
|
|
|
|
PIN_SLP(gpf3-0, INPUT, NONE);
|
|
PIN_SLP(gpf3-1, PREV, NONE);
|
|
PIN_SLP(gpf3-2, PREV, NONE);
|
|
PIN_SLP(gpf3-3, PREV, NONE);
|
|
PIN_SLP(gpf3-4, OUT1, NONE);
|
|
PIN_SLP(gpf3-5, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpj0-0, PREV, NONE);
|
|
PIN_SLP(gpj0-1, PREV, NONE);
|
|
PIN_SLP(gpj0-2, PREV, NONE);
|
|
PIN_SLP(gpj0-3, INPUT, DOWN);
|
|
PIN_SLP(gpj0-4, PREV, NONE);
|
|
PIN_SLP(gpj0-5, PREV, NONE);
|
|
PIN_SLP(gpj0-6, INPUT, DOWN);
|
|
PIN_SLP(gpj0-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpj1-0, INPUT, DOWN);
|
|
PIN_SLP(gpj1-1, PREV, NONE);
|
|
PIN_SLP(gpj1-2, PREV, NONE);
|
|
PIN_SLP(gpj1-3, INPUT, DOWN);
|
|
PIN_SLP(gpj1-4, INPUT, DOWN);
|
|
};
|
|
};
|
|
|
|
&pinctrl_1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sleep1>;
|
|
|
|
sleep1: sleep-states {
|
|
PIN_SLP(gpk0-0, PREV, NONE);
|
|
PIN_SLP(gpk0-1, PREV, NONE);
|
|
PIN_SLP(gpk0-2, OUT0, NONE);
|
|
PIN_SLP(gpk0-3, PREV, NONE);
|
|
PIN_SLP(gpk0-4, PREV, NONE);
|
|
PIN_SLP(gpk0-5, PREV, NONE);
|
|
PIN_SLP(gpk0-6, PREV, NONE);
|
|
|
|
PIN_SLP(gpk1-0, INPUT, DOWN);
|
|
PIN_SLP(gpk1-1, INPUT, DOWN);
|
|
PIN_SLP(gpk1-2, INPUT, DOWN);
|
|
PIN_SLP(gpk1-3, PREV, NONE);
|
|
PIN_SLP(gpk1-4, PREV, NONE);
|
|
PIN_SLP(gpk1-5, PREV, NONE);
|
|
PIN_SLP(gpk1-6, PREV, NONE);
|
|
|
|
PIN_SLP(gpk2-0, INPUT, DOWN);
|
|
PIN_SLP(gpk2-1, INPUT, DOWN);
|
|
PIN_SLP(gpk2-2, INPUT, DOWN);
|
|
PIN_SLP(gpk2-3, INPUT, DOWN);
|
|
PIN_SLP(gpk2-4, INPUT, DOWN);
|
|
PIN_SLP(gpk2-5, INPUT, DOWN);
|
|
PIN_SLP(gpk2-6, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpk3-0, OUT0, NONE);
|
|
PIN_SLP(gpk3-1, INPUT, NONE);
|
|
PIN_SLP(gpk3-2, INPUT, DOWN);
|
|
PIN_SLP(gpk3-3, INPUT, NONE);
|
|
PIN_SLP(gpk3-4, INPUT, NONE);
|
|
PIN_SLP(gpk3-5, INPUT, NONE);
|
|
PIN_SLP(gpk3-6, INPUT, NONE);
|
|
|
|
PIN_SLP(gpl0-0, INPUT, DOWN);
|
|
PIN_SLP(gpl0-1, INPUT, DOWN);
|
|
PIN_SLP(gpl0-2, INPUT, DOWN);
|
|
PIN_SLP(gpl0-3, INPUT, DOWN);
|
|
PIN_SLP(gpl0-4, PREV, NONE);
|
|
PIN_SLP(gpl0-6, PREV, NONE);
|
|
|
|
PIN_SLP(gpl1-0, INPUT, DOWN);
|
|
PIN_SLP(gpl1-1, INPUT, DOWN);
|
|
PIN_SLP(gpl2-0, INPUT, DOWN);
|
|
PIN_SLP(gpl2-1, INPUT, DOWN);
|
|
PIN_SLP(gpl2-2, INPUT, DOWN);
|
|
PIN_SLP(gpl2-3, INPUT, DOWN);
|
|
PIN_SLP(gpl2-4, INPUT, DOWN);
|
|
PIN_SLP(gpl2-5, INPUT, DOWN);
|
|
PIN_SLP(gpl2-6, PREV, NONE);
|
|
PIN_SLP(gpl2-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpm0-0, INPUT, DOWN);
|
|
PIN_SLP(gpm0-1, INPUT, DOWN);
|
|
PIN_SLP(gpm0-2, INPUT, DOWN);
|
|
PIN_SLP(gpm0-3, INPUT, DOWN);
|
|
PIN_SLP(gpm0-4, INPUT, DOWN);
|
|
PIN_SLP(gpm0-5, INPUT, DOWN);
|
|
PIN_SLP(gpm0-6, INPUT, DOWN);
|
|
PIN_SLP(gpm0-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpm1-0, INPUT, DOWN);
|
|
PIN_SLP(gpm1-1, INPUT, DOWN);
|
|
PIN_SLP(gpm1-2, INPUT, NONE);
|
|
PIN_SLP(gpm1-3, INPUT, NONE);
|
|
PIN_SLP(gpm1-4, INPUT, NONE);
|
|
PIN_SLP(gpm1-5, INPUT, NONE);
|
|
PIN_SLP(gpm1-6, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpm2-0, INPUT, NONE);
|
|
PIN_SLP(gpm2-1, INPUT, NONE);
|
|
PIN_SLP(gpm2-2, INPUT, DOWN);
|
|
PIN_SLP(gpm2-3, INPUT, DOWN);
|
|
PIN_SLP(gpm2-4, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpm3-0, PREV, NONE);
|
|
PIN_SLP(gpm3-1, PREV, NONE);
|
|
PIN_SLP(gpm3-2, PREV, NONE);
|
|
PIN_SLP(gpm3-3, OUT1, NONE);
|
|
PIN_SLP(gpm3-4, INPUT, DOWN);
|
|
PIN_SLP(gpm3-5, INPUT, DOWN);
|
|
PIN_SLP(gpm3-6, INPUT, DOWN);
|
|
PIN_SLP(gpm3-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpm4-0, INPUT, DOWN);
|
|
PIN_SLP(gpm4-1, INPUT, DOWN);
|
|
PIN_SLP(gpm4-2, INPUT, DOWN);
|
|
PIN_SLP(gpm4-3, INPUT, DOWN);
|
|
PIN_SLP(gpm4-4, INPUT, DOWN);
|
|
PIN_SLP(gpm4-5, INPUT, DOWN);
|
|
PIN_SLP(gpm4-6, INPUT, DOWN);
|
|
PIN_SLP(gpm4-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpy0-0, INPUT, DOWN);
|
|
PIN_SLP(gpy0-1, INPUT, DOWN);
|
|
PIN_SLP(gpy0-2, INPUT, DOWN);
|
|
PIN_SLP(gpy0-3, INPUT, DOWN);
|
|
PIN_SLP(gpy0-4, INPUT, DOWN);
|
|
PIN_SLP(gpy0-5, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpy1-0, INPUT, DOWN);
|
|
PIN_SLP(gpy1-1, INPUT, DOWN);
|
|
PIN_SLP(gpy1-2, INPUT, DOWN);
|
|
PIN_SLP(gpy1-3, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpy2-0, PREV, NONE);
|
|
PIN_SLP(gpy2-1, INPUT, DOWN);
|
|
PIN_SLP(gpy2-2, INPUT, NONE);
|
|
PIN_SLP(gpy2-3, INPUT, NONE);
|
|
PIN_SLP(gpy2-4, INPUT, NONE);
|
|
PIN_SLP(gpy2-5, INPUT, NONE);
|
|
|
|
PIN_SLP(gpy3-0, INPUT, DOWN);
|
|
PIN_SLP(gpy3-1, INPUT, DOWN);
|
|
PIN_SLP(gpy3-2, INPUT, DOWN);
|
|
PIN_SLP(gpy3-3, INPUT, DOWN);
|
|
PIN_SLP(gpy3-4, INPUT, DOWN);
|
|
PIN_SLP(gpy3-5, INPUT, DOWN);
|
|
PIN_SLP(gpy3-6, INPUT, DOWN);
|
|
PIN_SLP(gpy3-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpy4-0, INPUT, DOWN);
|
|
PIN_SLP(gpy4-1, INPUT, DOWN);
|
|
PIN_SLP(gpy4-2, INPUT, DOWN);
|
|
PIN_SLP(gpy4-3, INPUT, DOWN);
|
|
PIN_SLP(gpy4-4, INPUT, DOWN);
|
|
PIN_SLP(gpy4-5, INPUT, DOWN);
|
|
PIN_SLP(gpy4-6, INPUT, DOWN);
|
|
PIN_SLP(gpy4-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpy5-0, INPUT, DOWN);
|
|
PIN_SLP(gpy5-1, INPUT, DOWN);
|
|
PIN_SLP(gpy5-2, INPUT, DOWN);
|
|
PIN_SLP(gpy5-3, INPUT, DOWN);
|
|
PIN_SLP(gpy5-4, INPUT, DOWN);
|
|
PIN_SLP(gpy5-5, INPUT, DOWN);
|
|
PIN_SLP(gpy5-6, INPUT, DOWN);
|
|
PIN_SLP(gpy5-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpy6-0, INPUT, DOWN);
|
|
PIN_SLP(gpy6-1, INPUT, DOWN);
|
|
PIN_SLP(gpy6-2, INPUT, DOWN);
|
|
PIN_SLP(gpy6-3, INPUT, DOWN);
|
|
PIN_SLP(gpy6-4, INPUT, DOWN);
|
|
PIN_SLP(gpy6-5, INPUT, DOWN);
|
|
PIN_SLP(gpy6-6, INPUT, DOWN);
|
|
PIN_SLP(gpy6-7, INPUT, DOWN);
|
|
};
|
|
};
|
|
|
|
&pinctrl_2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sleep2>;
|
|
|
|
sleep2: sleep-states {
|
|
PIN_SLP(gpz-0, INPUT, DOWN);
|
|
PIN_SLP(gpz-1, INPUT, DOWN);
|
|
PIN_SLP(gpz-2, INPUT, DOWN);
|
|
PIN_SLP(gpz-3, INPUT, DOWN);
|
|
PIN_SLP(gpz-4, INPUT, DOWN);
|
|
PIN_SLP(gpz-5, INPUT, DOWN);
|
|
PIN_SLP(gpz-6, INPUT, DOWN);
|
|
};
|
|
};
|
|
|
|
&pinctrl_3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sleep3>;
|
|
|
|
sleep3: sleep-states {
|
|
PIN_SLP(gpv0-0, INPUT, DOWN);
|
|
PIN_SLP(gpv0-1, INPUT, DOWN);
|
|
PIN_SLP(gpv0-2, INPUT, DOWN);
|
|
PIN_SLP(gpv0-3, INPUT, DOWN);
|
|
PIN_SLP(gpv0-4, INPUT, DOWN);
|
|
PIN_SLP(gpv0-5, INPUT, DOWN);
|
|
PIN_SLP(gpv0-6, INPUT, DOWN);
|
|
PIN_SLP(gpv0-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpv1-0, INPUT, DOWN);
|
|
PIN_SLP(gpv1-1, INPUT, DOWN);
|
|
PIN_SLP(gpv1-2, INPUT, DOWN);
|
|
PIN_SLP(gpv1-3, INPUT, DOWN);
|
|
PIN_SLP(gpv1-4, INPUT, DOWN);
|
|
PIN_SLP(gpv1-5, INPUT, DOWN);
|
|
PIN_SLP(gpv1-6, INPUT, DOWN);
|
|
PIN_SLP(gpv1-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpv2-0, INPUT, DOWN);
|
|
PIN_SLP(gpv2-1, INPUT, DOWN);
|
|
PIN_SLP(gpv2-2, INPUT, DOWN);
|
|
PIN_SLP(gpv2-3, INPUT, DOWN);
|
|
PIN_SLP(gpv2-4, INPUT, DOWN);
|
|
PIN_SLP(gpv2-5, INPUT, DOWN);
|
|
PIN_SLP(gpv2-6, INPUT, DOWN);
|
|
PIN_SLP(gpv2-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpv3-0, INPUT, DOWN);
|
|
PIN_SLP(gpv3-1, INPUT, DOWN);
|
|
PIN_SLP(gpv3-2, INPUT, DOWN);
|
|
PIN_SLP(gpv3-3, INPUT, DOWN);
|
|
PIN_SLP(gpv3-4, INPUT, DOWN);
|
|
PIN_SLP(gpv3-5, INPUT, DOWN);
|
|
PIN_SLP(gpv3-6, INPUT, DOWN);
|
|
PIN_SLP(gpv3-7, INPUT, DOWN);
|
|
|
|
PIN_SLP(gpv4-0, INPUT, DOWN);
|
|
};
|
|
};
|
|
|
|
&pwm {
|
|
pinctrl-0 = <&pwm0_out>;
|
|
pinctrl-names = "default";
|
|
samsung,pwm-outputs = <0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rtc {
|
|
status = "okay";
|
|
clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
|
|
clock-names = "rtc", "rtc_src";
|
|
};
|
|
|
|
&sdhci_2 {
|
|
bus-width = <4>;
|
|
cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
|
|
cd-inverted;
|
|
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
|
|
pinctrl-names = "default";
|
|
vmmc-supply = <&ldo21_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&serial_0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&serial_1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&serial_2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&serial_3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi_1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi1_bus>;
|
|
cs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
|
|
s5c73m3_spi: s5c73m3@0 {
|
|
compatible = "samsung,s5c73m3";
|
|
spi-max-frequency = <50000000>;
|
|
reg = <0>;
|
|
controller-data {
|
|
samsung,spi-feedback-delay = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&tmu {
|
|
vtmu-supply = <&ldo10_reg>;
|
|
status = "okay";
|
|
};
|