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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8cee8af2ac
Add device tree for the Amarillo validation board with an AXM5516 SoC. Signed-off-by: Anders Berg <anders.berg@lsi.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
205 lines
4.0 KiB
Plaintext
205 lines
4.0 KiB
Plaintext
/*
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* arch/arm/boot/dts/axm5516-cpus.dtsi
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*
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* Copyright (C) 2013 LSI
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&CPU0>;
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};
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core1 {
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cpu = <&CPU1>;
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};
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core2 {
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cpu = <&CPU2>;
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};
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core3 {
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cpu = <&CPU3>;
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};
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};
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cluster1 {
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core0 {
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cpu = <&CPU4>;
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};
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core1 {
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cpu = <&CPU5>;
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};
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core2 {
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cpu = <&CPU6>;
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};
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core3 {
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cpu = <&CPU7>;
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};
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};
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cluster2 {
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core0 {
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cpu = <&CPU8>;
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};
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core1 {
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cpu = <&CPU9>;
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};
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core2 {
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cpu = <&CPU10>;
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};
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core3 {
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cpu = <&CPU11>;
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};
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};
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cluster3 {
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core0 {
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cpu = <&CPU12>;
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};
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core1 {
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cpu = <&CPU13>;
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};
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core2 {
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cpu = <&CPU14>;
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};
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core3 {
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cpu = <&CPU15>;
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};
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};
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};
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CPU0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x00>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x01>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x02>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x03>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU4: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x100>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU5: cpu@101 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x101>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU6: cpu@102 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x102>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU7: cpu@103 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x103>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU8: cpu@200 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x200>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU9: cpu@201 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x201>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU10: cpu@202 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x202>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU11: cpu@203 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x203>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU12: cpu@300 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x300>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU13: cpu@301 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x301>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU14: cpu@302 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x302>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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CPU15: cpu@303 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0x303>;
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clock-frequency= <1400000000>;
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cpu-release-addr = <0>; // Fixed by the boot loader
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};
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};
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};
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