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fcd4138653
Add device tree files for the Broadcom BCM23550 SoC and the Broadcom Sparrow board. Signed-off-by: Chris Brand <chris.brand@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
416 lines
10 KiB
Plaintext
416 lines
10 KiB
Plaintext
/*
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* BSD LICENSE
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*
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* Copyright(c) 2016 Broadcom. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Broadcom Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/* BCM23550 and BCM21664 have almost identical clocks */
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#include "dt-bindings/clock/bcm21664.h"
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#include "skeleton.dtsi"
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/ {
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model = "BCM23550 SoC";
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compatible = "brcm,bcm23550";
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interrupt-parent = <&gic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0>;
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clock-frequency = <1000000000>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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enable-method = "brcm,bcm23550";
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secondary-boot-reg = <0x35004178>;
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reg = <1>;
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clock-frequency = <1000000000>;
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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enable-method = "brcm,bcm23550";
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secondary-boot-reg = <0x35004178>;
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reg = <2>;
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clock-frequency = <1000000000>;
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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enable-method = "brcm,bcm23550";
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secondary-boot-reg = <0x35004178>;
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reg = <3>;
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clock-frequency = <1000000000>;
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};
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};
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/* Hub bus */
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hub@34000000 {
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compatible = "simple-bus";
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ranges = <0 0x34000000 0x102f83ac>;
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#address-cells = <1>;
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#size-cells = <1>;
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smc@4e000 {
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compatible = "brcm,bcm23550-smc", "brcm,kona-smc";
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reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
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};
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resetmgr: reset-controller@1001f00 {
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compatible = "brcm,bcm21664-resetmgr";
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reg = <0x01001f00 0x24>;
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};
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gpio: gpio@1003000 {
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compatible = "brcm,bcm23550-gpio", "brcm,kona-gpio";
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reg = <0x01003000 0x524>;
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interrupts =
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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};
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timer@1006000 {
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compatible = "brcm,kona-timer";
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reg = <0x01006000 0x1c>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
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};
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};
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/* Slaves bus */
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slaves@3e000000 {
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compatible = "simple-bus";
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ranges = <0 0x3e000000 0x0001c070>;
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#address-cells = <1>;
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#size-cells = <1>;
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uartb: serial@0 {
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compatible = "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x00000000 0x118>;
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clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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uartb2: serial@1000 {
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compatible = "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x00001000 0x118>;
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clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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uartb3: serial@2000 {
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compatible = "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x00002000 0x118>;
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clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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bsc1: i2c@16000 {
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compatible = "brcm,kona-i2c";
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reg = <0x00016000 0x70>;
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
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status = "disabled";
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};
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bsc2: i2c@17000 {
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compatible = "brcm,kona-i2c";
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reg = <0x00017000 0x70>;
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interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
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status = "disabled";
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};
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bsc3: i2c@18000 {
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compatible = "brcm,kona-i2c";
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reg = <0x00018000 0x70>;
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interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
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status = "disabled";
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};
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bsc4: i2c@1c000 {
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compatible = "brcm,kona-i2c";
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reg = <0x0001c000 0x70>;
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interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
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status = "disabled";
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};
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};
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/* Apps bus */
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apps@3e300000 {
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compatible = "simple-bus";
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ranges = <0 0x3e300000 0x01b77000>;
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#address-cells = <1>;
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#size-cells = <1>;
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usbotg: usb@e20000 {
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compatible = "snps,dwc2";
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reg = <0x00e20000 0x10000>;
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&usb_otg_ahb_clk>;
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clock-names = "otg";
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phys = <&usbphy>;
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phy-names = "usb2-phy";
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status = "disabled";
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};
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usbphy: usb-phy@e30000 {
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compatible = "brcm,kona-usb2-phy";
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reg = <0x00e30000 0x28>;
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#phy-cells = <0>;
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status = "disabled";
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};
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sdio1: sdio@e80000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x00e80000 0x801c>;
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
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status = "disabled";
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};
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sdio2: sdio@e90000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x00e90000 0x801c>;
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
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status = "disabled";
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};
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sdio3: sdio@ea0000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x00ea0000 0x801c>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
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status = "disabled";
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};
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sdio4: sdio@eb0000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x00eb0000 0x801c>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
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status = "disabled";
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};
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cdc: cdc@1b0e000 {
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compatible = "brcm,bcm23550-cdc";
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reg = <0x01b0e000 0x78>;
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};
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gic: interrupt-controller@1b21000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x01b21000 0x1000>,
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<0x01b22000 0x1000>;
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};
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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/*
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* Fixed clocks are defined before CCUs whose
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* clocks may depend on them.
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*/
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ref_32k_clk: ref_32k {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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bbl_32k_clk: bbl_32k {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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ref_13m_clk: ref_13m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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};
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var_13m_clk: var_13m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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};
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dft_19_5m_clk: dft_19_5m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <19500000>;
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};
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ref_crystal_clk: ref_crystal {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <26000000>;
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};
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ref_52m_clk: ref_52m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <52000000>;
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};
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var_52m_clk: var_52m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <52000000>;
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};
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usb_otg_ahb_clk: usb_otg_ahb {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <52000000>;
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};
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ref_96m_clk: ref_96m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <96000000>;
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};
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var_96m_clk: var_96m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <96000000>;
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};
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ref_104m_clk: ref_104m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <104000000>;
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};
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var_104m_clk: var_104m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <104000000>;
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};
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ref_156m_clk: ref_156m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <156000000>;
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};
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var_156m_clk: var_156m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <156000000>;
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};
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root_ccu: root_ccu {
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compatible = BCM21664_DT_ROOT_CCU_COMPAT;
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reg = <0x35001000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "frac_1m";
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};
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aon_ccu: aon_ccu {
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compatible = BCM21664_DT_AON_CCU_COMPAT;
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reg = <0x35002000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "hub_timer";
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};
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slave_ccu: slave_ccu {
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compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
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reg = <0x3e011000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "uartb",
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"uartb2",
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"uartb3",
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"bsc1",
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"bsc2",
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"bsc3",
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"bsc4";
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};
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master_ccu: master_ccu {
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compatible = BCM21664_DT_MASTER_CCU_COMPAT;
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reg = <0x3f001000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "sdio1",
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"sdio2",
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"sdio3",
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"sdio4",
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"sdio1_sleep",
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"sdio2_sleep",
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"sdio3_sleep",
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"sdio4_sleep";
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};
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};
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};
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