mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-27 00:20:58 +07:00
cb935e7157
Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
117 lines
2.1 KiB
Plaintext
117 lines
2.1 KiB
Plaintext
/*
|
|
* vt8500.dtsi - Device tree file for VIA VT8500 SoC
|
|
*
|
|
* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
|
|
*
|
|
* Licensed under GPLv2 or later
|
|
*/
|
|
|
|
/include/ "skeleton.dtsi"
|
|
|
|
/ {
|
|
compatible = "via,vt8500";
|
|
|
|
soc {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "simple-bus";
|
|
ranges;
|
|
interrupt-parent = <&intc>;
|
|
|
|
intc: interrupt-controller@d8140000 {
|
|
compatible = "via,vt8500-intc";
|
|
interrupt-controller;
|
|
reg = <0xd8140000 0x10000>;
|
|
#interrupt-cells = <1>;
|
|
};
|
|
|
|
gpio: gpio-controller@d8110000 {
|
|
compatible = "via,vt8500-gpio";
|
|
gpio-controller;
|
|
reg = <0xd8110000 0x10000>;
|
|
#gpio-cells = <3>;
|
|
};
|
|
|
|
pmc@d8130000 {
|
|
compatible = "via,vt8500-pmc";
|
|
reg = <0xd8130000 0x1000>;
|
|
|
|
clocks {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
ref24: ref24M {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <24000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
timer@d8130100 {
|
|
compatible = "via,vt8500-timer";
|
|
reg = <0xd8130100 0x28>;
|
|
interrupts = <36>;
|
|
};
|
|
|
|
ehci@d8007900 {
|
|
compatible = "via,vt8500-ehci";
|
|
reg = <0xd8007900 0x200>;
|
|
interrupts = <43>;
|
|
};
|
|
|
|
uhci@d8007b00 {
|
|
compatible = "platform-uhci";
|
|
reg = <0xd8007b00 0x200>;
|
|
interrupts = <43>;
|
|
};
|
|
|
|
fb@d800e400 {
|
|
compatible = "via,vt8500-fb";
|
|
reg = <0xd800e400 0x400>;
|
|
interrupts = <12>;
|
|
display = <&display>;
|
|
default-mode = <&mode0>;
|
|
};
|
|
|
|
ge_rops@d8050400 {
|
|
compatible = "wm,prizm-ge-rops";
|
|
reg = <0xd8050400 0x100>;
|
|
};
|
|
|
|
uart@d8200000 {
|
|
compatible = "via,vt8500-uart";
|
|
reg = <0xd8200000 0x1040>;
|
|
interrupts = <32>;
|
|
clocks = <&ref24>;
|
|
};
|
|
|
|
uart@d82b0000 {
|
|
compatible = "via,vt8500-uart";
|
|
reg = <0xd82b0000 0x1040>;
|
|
interrupts = <33>;
|
|
clocks = <&ref24>;
|
|
};
|
|
|
|
uart@d8210000 {
|
|
compatible = "via,vt8500-uart";
|
|
reg = <0xd8210000 0x1040>;
|
|
interrupts = <47>;
|
|
clocks = <&ref24>;
|
|
};
|
|
|
|
uart@d82c0000 {
|
|
compatible = "via,vt8500-uart";
|
|
reg = <0xd82c0000 0x1040>;
|
|
interrupts = <50>;
|
|
clocks = <&ref24>;
|
|
};
|
|
|
|
rtc@d8100000 {
|
|
compatible = "via,vt8500-rtc";
|
|
reg = <0xd8100000 0x10000>;
|
|
interrupts = <48>;
|
|
};
|
|
};
|
|
};
|