mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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869f92aed2
Add CPU Frequency information to the r8a7778 DTS file. This will allow us to use the shared C code on r8a7778 and BockW which reads out the clock frequency from DT and calculates the delay settings from there. Also add other missing CPU information to the r8a7778 DTS. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
268 lines
6.2 KiB
Plaintext
268 lines
6.2 KiB
Plaintext
/*
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* Device Tree Source for Renesas r8a7778
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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*
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* based on r8a7779
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Simon Horman
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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compatible = "renesas,r8a7778";
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interrupt-parent = <&gic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0>;
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clock-frequency = <800000000>;
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};
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};
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aliases {
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spi0 = &hspi0;
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spi1 = &hspi1;
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spi2 = &hspi2;
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};
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gic: interrupt-controller@fe438000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0xfe438000 0x1000>,
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<0xfe430000 0x100>;
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};
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/* irqpin: IRQ0 - IRQ3 */
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irqpin: irqpin@fe78001c {
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compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
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#interrupt-cells = <2>;
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interrupt-controller;
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status = "disabled"; /* default off */
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reg = <0xfe78001c 4>,
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<0xfe780010 4>,
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<0xfe780024 4>,
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<0xfe780044 4>,
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<0xfe780064 4>;
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interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
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0 28 IRQ_TYPE_LEVEL_HIGH
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0 29 IRQ_TYPE_LEVEL_HIGH
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0 30 IRQ_TYPE_LEVEL_HIGH>;
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sense-bitfield-width = <2>;
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};
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gpio0: gpio@ffc40000 {
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compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
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reg = <0xffc40000 0x2c>;
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interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 0 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio1: gpio@ffc41000 {
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compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
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reg = <0xffc41000 0x2c>;
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interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 32 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio2: gpio@ffc42000 {
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compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
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reg = <0xffc42000 0x2c>;
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interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 64 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio3: gpio@ffc43000 {
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compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
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reg = <0xffc43000 0x2c>;
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interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 96 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio4: gpio@ffc44000 {
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compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
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reg = <0xffc44000 0x2c>;
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interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 128 27>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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pfc: pfc@fffc0000 {
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compatible = "renesas,pfc-r8a7778";
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reg = <0xfffc0000 0x118>;
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};
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i2c0: i2c@ffc70000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7778";
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reg = <0xffc70000 0x1000>;
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interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c1: i2c@ffc71000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7778";
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reg = <0xffc71000 0x1000>;
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interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c2: i2c@ffc72000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7778";
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reg = <0xffc72000 0x1000>;
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interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c3: i2c@ffc73000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7778";
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reg = <0xffc73000 0x1000>;
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interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scif0: serial@ffe40000 {
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compatible = "renesas,scif-r8a7778", "renesas,scif";
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reg = <0xffe40000 0x100>;
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interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scif1: serial@ffe41000 {
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compatible = "renesas,scif-r8a7778", "renesas,scif";
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reg = <0xffe41000 0x100>;
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interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scif2: serial@ffe42000 {
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compatible = "renesas,scif-r8a7778", "renesas,scif";
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reg = <0xffe42000 0x100>;
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interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scif3: serial@ffe43000 {
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compatible = "renesas,scif-r8a7778", "renesas,scif";
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reg = <0xffe43000 0x100>;
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interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scif4: serial@ffe44000 {
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compatible = "renesas,scif-r8a7778", "renesas,scif";
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reg = <0xffe44000 0x100>;
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interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scif5: serial@ffe45000 {
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compatible = "renesas,scif-r8a7778", "renesas,scif";
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reg = <0xffe45000 0x100>;
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interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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mmcif: mmc@ffe4e000 {
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compatible = "renesas,sh-mmcif";
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reg = <0xffe4e000 0x100>;
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interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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sdhi0: sd@ffe4c000 {
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compatible = "renesas,sdhi-r8a7778";
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reg = <0xffe4c000 0x100>;
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interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
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cap-sd-highspeed;
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cap-sdio-irq;
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status = "disabled";
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};
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sdhi1: sd@ffe4d000 {
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compatible = "renesas,sdhi-r8a7778";
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reg = <0xffe4d000 0x100>;
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interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
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cap-sd-highspeed;
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cap-sdio-irq;
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status = "disabled";
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};
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sdhi2: sd@ffe4f000 {
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compatible = "renesas,sdhi-r8a7778";
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reg = <0xffe4f000 0x100>;
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interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
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cap-sd-highspeed;
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cap-sdio-irq;
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status = "disabled";
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};
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hspi0: spi@fffc7000 {
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compatible = "renesas,hspi-r8a7778", "renesas,hspi";
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reg = <0xfffc7000 0x18>;
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interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hspi1: spi@fffc8000 {
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compatible = "renesas,hspi-r8a7778", "renesas,hspi";
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reg = <0xfffc8000 0x18>;
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interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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hspi2: spi@fffc6000 {
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compatible = "renesas,hspi-r8a7778", "renesas,hspi";
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reg = <0xfffc6000 0x18>;
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interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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