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d6ed935513
Add support for pinctrl on MT7622 SoC. The IO core found on the SoC has the registers for pinctrl, pinconf and gpio mixed up in the same register range. However, the IO core for the MT7622 SoC is completely distinct from anyone of previous MediaTek SoCs which already had support, such as the hardware internal, register address map and register detailed definition for each pin. Therefore, instead, the driver is being newly implemented by reusing generic methods provided from the core layer with GENERIC_PINCONF, GENERIC_PINCTRL_GROUPS, and GENERIC_PINMUX_FUNCTIONS for the sake of code simplicity and rid of superfluous code. Where the function of pins determined by groups is utilized in this driver which can help developers less confused with what combinations of pins effective on the SoC and even reducing the mistakes during the integration of those relevant boards. As the gpio_chip handling is also only a few lines, the driver also implements the gpio functionality directly through GPIOLIB. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
12 lines
401 B
Makefile
12 lines
401 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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# Core
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obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
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# SoC Drivers
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obj-$(CONFIG_PINCTRL_MT2701) += pinctrl-mt2701.o
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obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o
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obj-$(CONFIG_PINCTRL_MT8127) += pinctrl-mt8127.o
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obj-$(CONFIG_PINCTRL_MT7622) += pinctrl-mt7622.o
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obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o
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obj-$(CONFIG_PINCTRL_MT6397) += pinctrl-mt6397.o
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