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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e183914af0
A lot of asm-optimized routines in arch/x86/crypto/ keep its constants in .data. This is wrong, they should be on .rodata. Mnay of these constants are the same in different modules. For example, 128-bit shuffle mask 0x000102030405060708090A0B0C0D0E0F exists in at least half a dozen places. There is a way to let linker merge them and use just one copy. The rules are as follows: mergeable objects of different sizes should not share sections. You can't put them all in one .rodata section, they will lose "mergeability". GCC puts its mergeable constants in ".rodata.cstSIZE" sections, or ".rodata.cstSIZE.<object_name>" if -fdata-sections is used. This patch does the same: .section .rodata.cst16.SHUF_MASK, "aM", @progbits, 16 It is important that all data in such section consists of 16-byte elements, not larger ones, and there are no implicit use of one element from another. When this is not the case, use non-mergeable section: .section .rodata[.VAR_NAME], "a", @progbits This reduces .data by ~15 kbytes: text data bss dec hex filename 11097415 2705840 2630712 16433967 fac32f vmlinux-prev.o 11112095 2690672 2630712 16433479 fac147 vmlinux.o Merged objects are visible in System.map: ffffffff81a28810 r POLY ffffffff81a28810 r POLY ffffffff81a28820 r TWOONE ffffffff81a28820 r TWOONE ffffffff81a28830 r PSHUFFLE_BYTE_FLIP_MASK <- merged regardless of ffffffff81a28830 r SHUF_MASK <------------- the name difference ffffffff81a28830 r SHUF_MASK ffffffff81a28830 r SHUF_MASK .. ffffffff81a28d00 r K512 <- merged three identical 640-byte tables ffffffff81a28d00 r K512 ffffffff81a28d00 r K512 Use of object names in section name suffixes is not strictly necessary, but might help if someday link stage will use garbage collection to eliminate unused sections (ld --gc-sections). Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com> CC: Herbert Xu <herbert@gondor.apana.org.au> CC: Josh Poimboeuf <jpoimboe@redhat.com> CC: Xiaodong Liu <xiaodong.liu@intel.com> CC: Megha Dey <megha.dey@intel.com> CC: linux-crypto@vger.kernel.org CC: x86@kernel.org CC: linux-kernel@vger.kernel.org Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
472 lines
11 KiB
ArmAsm
472 lines
11 KiB
ArmAsm
/*
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* Twofish Cipher 8-way parallel algorithm (AVX/x86_64)
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*
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* Copyright (C) 2012 Johannes Goetzfried
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* <Johannes.Goetzfried@informatik.stud.uni-erlangen.de>
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*
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* Copyright © 2012-2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
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* USA
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*
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*/
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#include <linux/linkage.h>
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#include <asm/frame.h>
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#include "glue_helper-asm-avx.S"
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.file "twofish-avx-x86_64-asm_64.S"
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.section .rodata.cst16.bswap128_mask, "aM", @progbits, 16
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.align 16
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.Lbswap128_mask:
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.byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0
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.section .rodata.cst16.xts_gf128mul_and_shl1_mask, "aM", @progbits, 16
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.align 16
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.Lxts_gf128mul_and_shl1_mask:
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.byte 0x87, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
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.text
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/* structure of crypto context */
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#define s0 0
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#define s1 1024
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#define s2 2048
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#define s3 3072
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#define w 4096
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#define k 4128
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/**********************************************************************
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8-way AVX twofish
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**********************************************************************/
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#define CTX %rdi
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#define RA1 %xmm0
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#define RB1 %xmm1
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#define RC1 %xmm2
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#define RD1 %xmm3
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#define RA2 %xmm4
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#define RB2 %xmm5
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#define RC2 %xmm6
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#define RD2 %xmm7
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#define RX0 %xmm8
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#define RY0 %xmm9
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#define RX1 %xmm10
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#define RY1 %xmm11
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#define RK1 %xmm12
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#define RK2 %xmm13
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#define RT %xmm14
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#define RR %xmm15
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#define RID1 %rbp
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#define RID1d %ebp
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#define RID2 %rsi
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#define RID2d %esi
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#define RGI1 %rdx
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#define RGI1bl %dl
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#define RGI1bh %dh
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#define RGI2 %rcx
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#define RGI2bl %cl
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#define RGI2bh %ch
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#define RGI3 %rax
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#define RGI3bl %al
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#define RGI3bh %ah
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#define RGI4 %rbx
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#define RGI4bl %bl
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#define RGI4bh %bh
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#define RGS1 %r8
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#define RGS1d %r8d
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#define RGS2 %r9
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#define RGS2d %r9d
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#define RGS3 %r10
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#define RGS3d %r10d
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#define lookup_32bit(t0, t1, t2, t3, src, dst, interleave_op, il_reg) \
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movzbl src ## bl, RID1d; \
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movzbl src ## bh, RID2d; \
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shrq $16, src; \
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movl t0(CTX, RID1, 4), dst ## d; \
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movl t1(CTX, RID2, 4), RID2d; \
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movzbl src ## bl, RID1d; \
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xorl RID2d, dst ## d; \
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movzbl src ## bh, RID2d; \
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interleave_op(il_reg); \
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xorl t2(CTX, RID1, 4), dst ## d; \
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xorl t3(CTX, RID2, 4), dst ## d;
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#define dummy(d) /* do nothing */
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#define shr_next(reg) \
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shrq $16, reg;
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#define G(gi1, gi2, x, t0, t1, t2, t3) \
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lookup_32bit(t0, t1, t2, t3, ##gi1, RGS1, shr_next, ##gi1); \
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lookup_32bit(t0, t1, t2, t3, ##gi2, RGS3, shr_next, ##gi2); \
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\
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lookup_32bit(t0, t1, t2, t3, ##gi1, RGS2, dummy, none); \
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shlq $32, RGS2; \
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orq RGS1, RGS2; \
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lookup_32bit(t0, t1, t2, t3, ##gi2, RGS1, dummy, none); \
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shlq $32, RGS1; \
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orq RGS1, RGS3;
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#define round_head_2(a, b, x1, y1, x2, y2) \
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vmovq b ## 1, RGI3; \
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vpextrq $1, b ## 1, RGI4; \
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\
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G(RGI1, RGI2, x1, s0, s1, s2, s3); \
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vmovq a ## 2, RGI1; \
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vpextrq $1, a ## 2, RGI2; \
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vmovq RGS2, x1; \
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vpinsrq $1, RGS3, x1, x1; \
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\
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G(RGI3, RGI4, y1, s1, s2, s3, s0); \
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vmovq b ## 2, RGI3; \
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vpextrq $1, b ## 2, RGI4; \
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vmovq RGS2, y1; \
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vpinsrq $1, RGS3, y1, y1; \
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\
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G(RGI1, RGI2, x2, s0, s1, s2, s3); \
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vmovq RGS2, x2; \
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vpinsrq $1, RGS3, x2, x2; \
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\
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G(RGI3, RGI4, y2, s1, s2, s3, s0); \
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vmovq RGS2, y2; \
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vpinsrq $1, RGS3, y2, y2;
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#define encround_tail(a, b, c, d, x, y, prerotate) \
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vpaddd x, y, x; \
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vpaddd x, RK1, RT;\
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prerotate(b); \
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vpxor RT, c, c; \
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vpaddd y, x, y; \
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vpaddd y, RK2, y; \
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vpsrld $1, c, RT; \
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vpslld $(32 - 1), c, c; \
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vpor c, RT, c; \
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vpxor d, y, d; \
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#define decround_tail(a, b, c, d, x, y, prerotate) \
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vpaddd x, y, x; \
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vpaddd x, RK1, RT;\
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prerotate(a); \
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vpxor RT, c, c; \
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vpaddd y, x, y; \
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vpaddd y, RK2, y; \
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vpxor d, y, d; \
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vpsrld $1, d, y; \
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vpslld $(32 - 1), d, d; \
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vpor d, y, d; \
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#define rotate_1l(x) \
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vpslld $1, x, RR; \
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vpsrld $(32 - 1), x, x; \
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vpor x, RR, x;
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#define preload_rgi(c) \
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vmovq c, RGI1; \
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vpextrq $1, c, RGI2;
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#define encrypt_round(n, a, b, c, d, preload, prerotate) \
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vbroadcastss (k+4*(2*(n)))(CTX), RK1; \
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vbroadcastss (k+4*(2*(n)+1))(CTX), RK2; \
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round_head_2(a, b, RX0, RY0, RX1, RY1); \
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encround_tail(a ## 1, b ## 1, c ## 1, d ## 1, RX0, RY0, prerotate); \
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preload(c ## 1); \
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encround_tail(a ## 2, b ## 2, c ## 2, d ## 2, RX1, RY1, prerotate);
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#define decrypt_round(n, a, b, c, d, preload, prerotate) \
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vbroadcastss (k+4*(2*(n)))(CTX), RK1; \
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vbroadcastss (k+4*(2*(n)+1))(CTX), RK2; \
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round_head_2(a, b, RX0, RY0, RX1, RY1); \
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decround_tail(a ## 1, b ## 1, c ## 1, d ## 1, RX0, RY0, prerotate); \
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preload(c ## 1); \
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decround_tail(a ## 2, b ## 2, c ## 2, d ## 2, RX1, RY1, prerotate);
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#define encrypt_cycle(n) \
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encrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l); \
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encrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l);
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#define encrypt_cycle_last(n) \
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encrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l); \
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encrypt_round(((2*n) + 1), RC, RD, RA, RB, dummy, dummy);
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#define decrypt_cycle(n) \
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decrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l); \
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decrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l);
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#define decrypt_cycle_last(n) \
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decrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l); \
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decrypt_round((2*n), RA, RB, RC, RD, dummy, dummy);
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#define transpose_4x4(x0, x1, x2, x3, t0, t1, t2) \
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vpunpckldq x1, x0, t0; \
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vpunpckhdq x1, x0, t2; \
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vpunpckldq x3, x2, t1; \
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vpunpckhdq x3, x2, x3; \
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\
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vpunpcklqdq t1, t0, x0; \
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vpunpckhqdq t1, t0, x1; \
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vpunpcklqdq x3, t2, x2; \
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vpunpckhqdq x3, t2, x3;
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#define inpack_blocks(x0, x1, x2, x3, wkey, t0, t1, t2) \
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vpxor x0, wkey, x0; \
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vpxor x1, wkey, x1; \
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vpxor x2, wkey, x2; \
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vpxor x3, wkey, x3; \
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\
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transpose_4x4(x0, x1, x2, x3, t0, t1, t2)
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#define outunpack_blocks(x0, x1, x2, x3, wkey, t0, t1, t2) \
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transpose_4x4(x0, x1, x2, x3, t0, t1, t2) \
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\
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vpxor x0, wkey, x0; \
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vpxor x1, wkey, x1; \
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vpxor x2, wkey, x2; \
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vpxor x3, wkey, x3;
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.align 8
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__twofish_enc_blk8:
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/* input:
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* %rdi: ctx, CTX
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* RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2: blocks
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* output:
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* RC1, RD1, RA1, RB1, RC2, RD2, RA2, RB2: encrypted blocks
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*/
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vmovdqu w(CTX), RK1;
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pushq %rbp;
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pushq %rbx;
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pushq %rcx;
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inpack_blocks(RA1, RB1, RC1, RD1, RK1, RX0, RY0, RK2);
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preload_rgi(RA1);
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rotate_1l(RD1);
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inpack_blocks(RA2, RB2, RC2, RD2, RK1, RX0, RY0, RK2);
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rotate_1l(RD2);
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encrypt_cycle(0);
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encrypt_cycle(1);
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encrypt_cycle(2);
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encrypt_cycle(3);
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encrypt_cycle(4);
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encrypt_cycle(5);
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encrypt_cycle(6);
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encrypt_cycle_last(7);
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vmovdqu (w+4*4)(CTX), RK1;
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popq %rcx;
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popq %rbx;
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popq %rbp;
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outunpack_blocks(RC1, RD1, RA1, RB1, RK1, RX0, RY0, RK2);
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outunpack_blocks(RC2, RD2, RA2, RB2, RK1, RX0, RY0, RK2);
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ret;
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ENDPROC(__twofish_enc_blk8)
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.align 8
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__twofish_dec_blk8:
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/* input:
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* %rdi: ctx, CTX
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* RC1, RD1, RA1, RB1, RC2, RD2, RA2, RB2: encrypted blocks
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* output:
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* RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2: decrypted blocks
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*/
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vmovdqu (w+4*4)(CTX), RK1;
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pushq %rbp;
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pushq %rbx;
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inpack_blocks(RC1, RD1, RA1, RB1, RK1, RX0, RY0, RK2);
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preload_rgi(RC1);
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rotate_1l(RA1);
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inpack_blocks(RC2, RD2, RA2, RB2, RK1, RX0, RY0, RK2);
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rotate_1l(RA2);
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decrypt_cycle(7);
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decrypt_cycle(6);
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decrypt_cycle(5);
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decrypt_cycle(4);
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decrypt_cycle(3);
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decrypt_cycle(2);
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decrypt_cycle(1);
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decrypt_cycle_last(0);
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vmovdqu (w)(CTX), RK1;
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popq %rbx;
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popq %rbp;
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outunpack_blocks(RA1, RB1, RC1, RD1, RK1, RX0, RY0, RK2);
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outunpack_blocks(RA2, RB2, RC2, RD2, RK1, RX0, RY0, RK2);
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ret;
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ENDPROC(__twofish_dec_blk8)
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ENTRY(twofish_ecb_enc_8way)
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/* input:
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* %rdi: ctx, CTX
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* %rsi: dst
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* %rdx: src
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*/
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FRAME_BEGIN
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movq %rsi, %r11;
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load_8way(%rdx, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
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call __twofish_enc_blk8;
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store_8way(%r11, RC1, RD1, RA1, RB1, RC2, RD2, RA2, RB2);
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FRAME_END
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ret;
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ENDPROC(twofish_ecb_enc_8way)
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ENTRY(twofish_ecb_dec_8way)
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/* input:
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* %rdi: ctx, CTX
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* %rsi: dst
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* %rdx: src
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*/
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FRAME_BEGIN
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movq %rsi, %r11;
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load_8way(%rdx, RC1, RD1, RA1, RB1, RC2, RD2, RA2, RB2);
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call __twofish_dec_blk8;
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store_8way(%r11, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
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FRAME_END
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ret;
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ENDPROC(twofish_ecb_dec_8way)
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ENTRY(twofish_cbc_dec_8way)
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/* input:
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* %rdi: ctx, CTX
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* %rsi: dst
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* %rdx: src
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*/
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FRAME_BEGIN
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pushq %r12;
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movq %rsi, %r11;
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movq %rdx, %r12;
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load_8way(%rdx, RC1, RD1, RA1, RB1, RC2, RD2, RA2, RB2);
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call __twofish_dec_blk8;
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store_cbc_8way(%r12, %r11, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
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popq %r12;
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FRAME_END
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ret;
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ENDPROC(twofish_cbc_dec_8way)
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ENTRY(twofish_ctr_8way)
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/* input:
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* %rdi: ctx, CTX
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* %rsi: dst
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* %rdx: src
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* %rcx: iv (little endian, 128bit)
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*/
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FRAME_BEGIN
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pushq %r12;
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movq %rsi, %r11;
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movq %rdx, %r12;
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load_ctr_8way(%rcx, .Lbswap128_mask, RA1, RB1, RC1, RD1, RA2, RB2, RC2,
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RD2, RX0, RX1, RY0);
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call __twofish_enc_blk8;
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store_ctr_8way(%r12, %r11, RC1, RD1, RA1, RB1, RC2, RD2, RA2, RB2);
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|
||
popq %r12;
|
||
|
||
FRAME_END
|
||
ret;
|
||
ENDPROC(twofish_ctr_8way)
|
||
|
||
ENTRY(twofish_xts_enc_8way)
|
||
/* input:
|
||
* %rdi: ctx, CTX
|
||
* %rsi: dst
|
||
* %rdx: src
|
||
* %rcx: iv (t ⊕ αⁿ ∈ GF(2¹²⁸))
|
||
*/
|
||
FRAME_BEGIN
|
||
|
||
movq %rsi, %r11;
|
||
|
||
/* regs <= src, dst <= IVs, regs <= regs xor IVs */
|
||
load_xts_8way(%rcx, %rdx, %rsi, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2,
|
||
RX0, RX1, RY0, .Lxts_gf128mul_and_shl1_mask);
|
||
|
||
call __twofish_enc_blk8;
|
||
|
||
/* dst <= regs xor IVs(in dst) */
|
||
store_xts_8way(%r11, RC1, RD1, RA1, RB1, RC2, RD2, RA2, RB2);
|
||
|
||
FRAME_END
|
||
ret;
|
||
ENDPROC(twofish_xts_enc_8way)
|
||
|
||
ENTRY(twofish_xts_dec_8way)
|
||
/* input:
|
||
* %rdi: ctx, CTX
|
||
* %rsi: dst
|
||
* %rdx: src
|
||
* %rcx: iv (t ⊕ αⁿ ∈ GF(2¹²⁸))
|
||
*/
|
||
FRAME_BEGIN
|
||
|
||
movq %rsi, %r11;
|
||
|
||
/* regs <= src, dst <= IVs, regs <= regs xor IVs */
|
||
load_xts_8way(%rcx, %rdx, %rsi, RC1, RD1, RA1, RB1, RC2, RD2, RA2, RB2,
|
||
RX0, RX1, RY0, .Lxts_gf128mul_and_shl1_mask);
|
||
|
||
call __twofish_dec_blk8;
|
||
|
||
/* dst <= regs xor IVs(in dst) */
|
||
store_xts_8way(%r11, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
|
||
|
||
FRAME_END
|
||
ret;
|
||
ENDPROC(twofish_xts_dec_8way)
|