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Prior to Tegra186, the selection of SFIO vs. GPIO modes was done as part of the GPIO controller's register programming. Starting with Tegra186, a pin is configured as GPIO or SFIO with a bit in a configuration register of the pin controller. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-10-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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| Kconfig | ||
| Makefile | ||
| pinctrl-tegra20.c | ||
| pinctrl-tegra30.c | ||
| pinctrl-tegra114.c | ||
| pinctrl-tegra124.c | ||
| pinctrl-tegra194.c | ||
| pinctrl-tegra210.c | ||
| pinctrl-tegra-xusb.c | ||
| pinctrl-tegra.c | ||
| pinctrl-tegra.h | ||