mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 10:05:18 +07:00
544393fe58
This lifts sisfb from version 1.7.17 to version 1.8.9. Changes include: - Added support for XGI V3XT, V5, V8, Z7 chipsets, including POSTing of all of these chipsets. - Added support for latest SiS chipsets (761). - Added support for SiS76x memory "hybrid" mode. - Added support for new LCD resolutions (eg 1280x854, 856x480). - Fixed support for 320x240 STN panels (for embedded devices). - Fixed many HDTV modes (525p, 750p, 1080i). - Fixed PCI config register reading/writing to use proper kernel functions for this purpose. - Fixed PCI ROM handling to use the kernel's proper functions. - Removed lots of "typedef"s. - Removed lots of code which was for X.org/XFree86 only. - Fixed coding style in many places. - Removed lots of 2.4 cruft. - Reduced stack size by unifying two previously separate structs into one. - Added new hooks for memory allocation (for DRM). Now the driver can truly handle multiple cards, including memory management. - Fixed numerous minor bugs. Signed-off-by: Thomas Winischhofer <thomas@winischhofer.net> Cc: "Antonino A. Daplas" <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
709 lines
26 KiB
C
709 lines
26 KiB
C
/* $XFree86$ */
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/* $XdotOrg$ */
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/*
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* Global definitions for init.c and init301.c
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*
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* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
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*
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* If distributed as part of the Linux kernel, the following license terms
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* apply:
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*
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* * This program is free software; you can redistribute it and/or modify
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* * it under the terms of the GNU General Public License as published by
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* * the Free Software Foundation; either version 2 of the named License,
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* * or any later version.
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* *
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* * This program is distributed in the hope that it will be useful,
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* * but WITHOUT ANY WARRANTY; without even the implied warranty of
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* * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* * GNU General Public License for more details.
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* *
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* * You should have received a copy of the GNU General Public License
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* * along with this program; if not, write to the Free Software
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* * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
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*
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* Otherwise, the following license terms apply:
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*
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* * Redistribution and use in source and binary forms, with or without
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* * modification, are permitted provided that the following conditions
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* * are met:
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* * 1) Redistributions of source code must retain the above copyright
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* * notice, this list of conditions and the following disclaimer.
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* * 2) Redistributions in binary form must reproduce the above copyright
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* * notice, this list of conditions and the following disclaimer in the
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* * documentation and/or other materials provided with the distribution.
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* * 3) The name of the author may not be used to endorse or promote products
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* * derived from this software without specific prior written permission.
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* *
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* * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Author: Thomas Winischhofer <thomas@winischhofer.net>
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*
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*/
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#ifndef _INITDEF_
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#define _INITDEF_
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#define IS_SIS330 (SiS_Pr->ChipType == SIS_330)
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#define IS_SIS550 (SiS_Pr->ChipType == SIS_550)
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#define IS_SIS650 (SiS_Pr->ChipType == SIS_650) /* All versions, incl 651, M65x */
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#define IS_SIS740 (SiS_Pr->ChipType == SIS_740)
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#define IS_SIS651 (SiS_Pr->SiS_SysFlags & (SF_Is651 | SF_Is652))
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#define IS_SISM650 (SiS_Pr->SiS_SysFlags & (SF_IsM650 | SF_IsM652 | SF_IsM653))
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#define IS_SIS65x (IS_SIS651 || IS_SISM650) /* Only special versions of 65x */
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#define IS_SIS661 (SiS_Pr->ChipType == SIS_661)
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#define IS_SIS741 (SiS_Pr->ChipType == SIS_741)
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#define IS_SIS660 (SiS_Pr->ChipType == SIS_660)
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#define IS_SIS760 (SiS_Pr->ChipType == SIS_760)
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#define IS_SIS761 (SiS_Pr->ChipType == SIS_761)
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#define IS_SIS661741660760 (IS_SIS661 || IS_SIS741 || IS_SIS660 || IS_SIS760 || IS_SIS761)
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#define IS_SIS650740 ((SiS_Pr->ChipType >= SIS_650) && (SiS_Pr->ChipType < SIS_330))
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#define IS_SIS550650740 (IS_SIS550 || IS_SIS650740)
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#define IS_SIS650740660 (IS_SIS650 || IS_SIS740 || IS_SIS661741660760)
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#define IS_SIS550650740660 (IS_SIS550 || IS_SIS650740660)
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#define SISGETROMW(x) (ROMAddr[(x)] | (ROMAddr[(x)+1] << 8))
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/* SiS_VBType */
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#define VB_SIS301 0x0001
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#define VB_SIS301B 0x0002
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#define VB_SIS302B 0x0004
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#define VB_SIS301LV 0x0008
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#define VB_SIS302LV 0x0010
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#define VB_SIS302ELV 0x0020
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#define VB_SIS301C 0x0040
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#define VB_SIS307T 0x0080
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#define VB_SIS307LV 0x0100
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#define VB_UMC 0x4000
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#define VB_NoLCD 0x8000
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#define VB_SIS30xB (VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
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#define VB_SIS30xC (VB_SIS301C | VB_SIS307T)
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#define VB_SISTMDS (VB_SIS301 | VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
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#define VB_SISLVDS (VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
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#define VB_SIS30xBLV (VB_SIS30xB | VB_SISLVDS)
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#define VB_SIS30xCLV (VB_SIS30xC | VB_SIS302ELV | VB_SIS307LV)
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#define VB_SISVB (VB_SIS301 | VB_SIS30xBLV)
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#define VB_SISLCDA (VB_SIS302B | VB_SIS301C | VB_SIS307T | VB_SISLVDS)
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#define VB_SISTMDSLCDA (VB_SIS301C | VB_SIS307T)
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#define VB_SISPART4SCALER (VB_SIS301C | VB_SIS307T | VB_SIS302ELV | VB_SIS307LV)
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#define VB_SISHIVISION (VB_SIS301 | VB_SIS301B | VB_SIS302B)
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#define VB_SISYPBPR (VB_SIS301C | VB_SIS307T | VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
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#define VB_SISTAP4SCALER (VB_SIS301C | VB_SIS307T | VB_SIS302ELV | VB_SIS307LV)
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#define VB_SISPART4OVERFLOW (VB_SIS301C | VB_SIS307T | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
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#define VB_SISPWD (VB_SIS301C | VB_SIS307T | VB_SISLVDS)
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#define VB_SISEMI (VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
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#define VB_SISPOWER (VB_SIS301C | VB_SIS307T | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
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#define VB_SISDUALLINK (VB_SIS302LV | VB_SIS302ELV | VB_SIS307T | VB_SIS307LV)
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#define VB_SISVGA2 VB_SISTMDS
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#define VB_SISRAMDAC202 (VB_SIS301C | VB_SIS307T)
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/* VBInfo */
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#define SetSimuScanMode 0x0001 /* CR 30 */
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#define SwitchCRT2 0x0002
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#define SetCRT2ToAVIDEO 0x0004
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#define SetCRT2ToSVIDEO 0x0008
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#define SetCRT2ToSCART 0x0010
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#define SetCRT2ToLCD 0x0020
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#define SetCRT2ToRAMDAC 0x0040
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#define SetCRT2ToHiVision 0x0080 /* for SiS bridge */
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#define SetCRT2ToCHYPbPr SetCRT2ToHiVision /* for Chrontel */
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#define SetNTSCTV 0x0000 /* CR 31 */
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#define SetPALTV 0x0100 /* Deprecated here, now in TVMode */
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#define SetInSlaveMode 0x0200
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#define SetNotSimuMode 0x0400
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#define SetNotSimuTVMode SetNotSimuMode
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#define SetDispDevSwitch 0x0800
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#define SetCRT2ToYPbPr525750 0x0800
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#define LoadDACFlag 0x1000
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#define DisableCRT2Display 0x2000
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#define DriverMode 0x4000
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#define HotKeySwitch 0x8000
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#define SetCRT2ToLCDA 0x8000
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/* v-- Needs change in sis_vga.c if changed (GPIO) --v */
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#define SetCRT2ToTV (SetCRT2ToYPbPr525750|SetCRT2ToHiVision|SetCRT2ToSCART|SetCRT2ToSVIDEO|SetCRT2ToAVIDEO)
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#define SetCRT2ToTVNoYPbPrHiVision (SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)
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#define SetCRT2ToTVNoHiVision (SetCRT2ToYPbPr525750 | SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)
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/* SiS_ModeType */
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#define ModeText 0x00
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#define ModeCGA 0x01
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#define ModeEGA 0x02
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#define ModeVGA 0x03
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#define Mode15Bpp 0x04
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#define Mode16Bpp 0x05
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#define Mode24Bpp 0x06
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#define Mode32Bpp 0x07
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#define ModeTypeMask 0x07
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#define IsTextMode 0x07
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#define DACInfoFlag 0x0018
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#define MemoryInfoFlag 0x01E0
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#define MemorySizeShift 5
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/* modeflag */
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#define Charx8Dot 0x0200
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#define LineCompareOff 0x0400
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#define CRT2Mode 0x0800
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#define HalfDCLK 0x1000
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#define NoSupportSimuTV 0x2000
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#define NoSupportLCDScale 0x4000 /* SiS bridge: No scaling possible (no matter what panel) */
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#define DoubleScanMode 0x8000
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/* Infoflag */
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#define SupportTV 0x0008
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#define SupportTV1024 0x0800
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#define SupportCHTV 0x0800
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#define Support64048060Hz 0x0800 /* Special for 640x480 LCD */
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#define SupportHiVision 0x0010
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#define SupportYPbPr750p 0x1000
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#define SupportLCD 0x0020
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#define SupportRAMDAC2 0x0040 /* All (<= 100Mhz) */
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#define SupportRAMDAC2_135 0x0100 /* All except DH (<= 135Mhz) */
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#define SupportRAMDAC2_162 0x0200 /* B, C (<= 162Mhz) */
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#define SupportRAMDAC2_202 0x0400 /* C (<= 202Mhz) */
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#define InterlaceMode 0x0080
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#define SyncPP 0x0000
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#define HaveWideTiming 0x2000 /* Have specific wide- and non-wide timing */
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#define SyncPN 0x4000
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#define SyncNP 0x8000
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#define SyncNN 0xc000
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/* SetFlag */
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#define ProgrammingCRT2 0x0001
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#define LowModeTests 0x0002
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/* #define TVSimuMode 0x0002 - deprecated */
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/* #define RPLLDIV2XO 0x0004 - deprecated */
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#define LCDVESATiming 0x0008
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#define EnableLVDSDDA 0x0010
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#define SetDispDevSwitchFlag 0x0020
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#define CheckWinDos 0x0040
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#define SetDOSMode 0x0080
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/* TVMode flag */
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#define TVSetPAL 0x0001
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#define TVSetNTSCJ 0x0002
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#define TVSetPALM 0x0004
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#define TVSetPALN 0x0008
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#define TVSetCHOverScan 0x0010
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#define TVSetYPbPr525i 0x0020 /* new 0x10 */
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#define TVSetYPbPr525p 0x0040 /* new 0x20 */
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#define TVSetYPbPr750p 0x0080 /* new 0x40 */
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#define TVSetHiVision 0x0100 /* new 0x80; = 1080i, software-wise identical */
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#define TVSetTVSimuMode 0x0200 /* new 0x200, prev. 0x800 */
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#define TVRPLLDIV2XO 0x0400 /* prev 0x1000 */
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#define TVSetNTSC1024 0x0800 /* new 0x100, prev. 0x2000 */
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#define TVSet525p1024 0x1000 /* TW */
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#define TVAspect43 0x2000
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#define TVAspect169 0x4000
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#define TVAspect43LB 0x8000
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/* YPbPr flag (>=315, <661; converted to TVMode) */
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#define YPbPr525p 0x0001
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#define YPbPr750p 0x0002
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#define YPbPr525i 0x0004
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#define YPbPrHiVision 0x0008
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#define YPbPrModeMask (YPbPr750p | YPbPr525p | YPbPr525i | YPbPrHiVision)
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/* SysFlags (to identify special versions) */
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#define SF_Is651 0x0001
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#define SF_IsM650 0x0002
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#define SF_Is652 0x0004
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#define SF_IsM652 0x0008
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#define SF_IsM653 0x0010
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#define SF_IsM661 0x0020
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#define SF_IsM741 0x0040
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#define SF_IsM760 0x0080
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#define SF_760UMA 0x4000 /* 76x: We have UMA */
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#define SF_760LFB 0x8000 /* 76x: We have LFB */
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/* CR32 (Newer 630, and 315 series)
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[0] VB connected with CVBS
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[1] VB connected with SVHS
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[2] VB connected with SCART
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[3] VB connected with LCD
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[4] VB connected with CRT2 (secondary VGA)
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[5] CRT1 monitor is connected
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[6] VB connected with Hi-Vision TV
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[7] <= 330: VB connected with DVI combo connector
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>= 661: VB connected to YPbPr
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*/
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/* CR35 (300 series only) */
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#define TVOverScan 0x10
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#define TVOverScanShift 4
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/* CR35 (661 series only)
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[0] 1 = PAL, 0 = NTSC
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[1] 1 = NTSC-J (if D0 = 0)
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[2] 1 = PALM (if D0 = 1)
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[3] 1 = PALN (if D0 = 1)
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[4] 1 = Overscan (Chrontel only)
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[7:5] (only if D2 in CR38 is set)
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000 525i
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001 525p
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010 750p
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011 1080i (or HiVision on 301, 301B)
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*/
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/* CR37
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[0] Set 24/18 bit (0/1) RGB to LVDS/TMDS transmitter (set by BIOS)
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[3:1] External chip
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300 series:
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001 SiS301 (never seen)
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010 LVDS
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011 LVDS + Tumpion Zurac
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100 LVDS + Chrontel 7005
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110 Chrontel 7005
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315/330 series
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001 SiS30x (never seen)
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010 LVDS
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011 LVDS + Chrontel 7019
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660 series [2:1] only:
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reserved (chip type now in CR38)
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All other combinations reserved
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[3] 661 only: Pass 1:1 data
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[4] LVDS: 0: Panel Link expands / 1: Panel Link does not expand
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30x: 0: Bridge scales / 1: Bridge does not scale = Panel scales (if possible)
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[5] LCD polarity select
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0: VESA DMT Standard
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1: EDID 2.x defined
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[6] LCD horizontal polarity select
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0: High active
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1: Low active
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[7] LCD vertical polarity select
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0: High active
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1: Low active
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*/
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/* CR37: LCDInfo */
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#define LCDRGB18Bit 0x0001
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#define LCDNonExpanding 0x0010
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#define LCDSync 0x0020
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#define LCDPass11 0x0100 /* 0: center screen, 1: Pass 1:1 data */
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#define LCDDualLink 0x0200
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#define DontExpandLCD LCDNonExpanding
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#define LCDNonExpandingShift 4
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#define DontExpandLCDShift LCDNonExpandingShift
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#define LCDSyncBit 0x00e0
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#define LCDSyncShift 6
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/* CR38 (315 series) */
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#define EnableDualEdge 0x01
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#define SetToLCDA 0x02 /* LCD channel A (301C/302B/30x(E)LV and 650+LVDS only) */
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#define EnableCHScart 0x04 /* Scart on Ch7019 (unofficial definition - TW) */
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#define EnableCHYPbPr 0x08 /* YPbPr on Ch7019 (480i HDTV); only on 650/Ch7019 systems */
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#define EnableSiSYPbPr 0x08 /* Enable YPbPr mode (30xLV/301C only) */
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#define EnableYPbPr525i 0x00 /* Enable 525i YPbPr mode (30xLV/301C only) (mask 0x30) */
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#define EnableYPbPr525p 0x10 /* Enable 525p YPbPr mode (30xLV/301C only) (mask 0x30) */
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#define EnableYPbPr750p 0x20 /* Enable 750p YPbPr mode (30xLV/301C only) (mask 0x30) */
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#define EnableYPbPr1080i 0x30 /* Enable 1080i YPbPr mode (30xLV/301C only) (mask 0x30) */
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#define EnablePALM 0x40 /* 1 = Set PALM */
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#define EnablePALN 0x80 /* 1 = Set PALN */
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#define EnableNTSCJ EnablePALM /* Not BIOS */
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/* CR38 (661 and later)
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D[7:5] 000 No VB
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001 301 series VB
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010 LVDS
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011 Chrontel 7019
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100 Conexant
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D2 Enable YPbPr output (see CR35)
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D[1:0] LCDA (like before)
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*/
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#define EnablePALMN 0x40 /* Romflag: 1 = Allow PALM/PALN */
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/* CR39 (650 only) */
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#define LCDPass1_1 0x01 /* 0: center screen, 1: pass 1:1 data output */
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#define Enable302LV_DualLink 0x04 /* 302LV only; enable dual link */
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/* CR39 (661 and later)
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D[7] LVDS (SiS or third party)
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D[1:0] YPbPr Aspect Ratio
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00 4:3 letterbox
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01 4:3
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10 16:9
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11 4:3
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*/
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/* CR3B (651+301C)
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D[1:0] YPbPr Aspect Ratio
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?
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*/
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/* CR79 (315/330 series only; not 661 and later)
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[3-0] Notify driver
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0001 Mode Switch event (set by BIOS)
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0010 Epansion On/Off event
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0011 TV UnderScan/OverScan event
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0100 Set Brightness event
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0101 Set Contrast event
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0110 Set Mute event
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0111 Set Volume Up/Down event
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[4] Enable Backlight Control by BIOS/driver
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(set by driver; set means that the BIOS should
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not touch the backlight registers because eg.
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the driver already switched off the backlight)
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[5] PAL/NTSC (set by BIOS)
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[6] Expansion On/Off (set by BIOS; copied to CR32[4])
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[7] TV UnderScan/OverScan (set by BIOS)
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*/
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/* CR7C - 661 and later
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[7] DualEdge enabled (or: to be enabled)
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[6] CRT2 = TV/LCD/VGA enabled (or: to be enabled)
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[5] Init done (set at end of SiS_Init)
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{4] LVDS LCD capabilities
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[3] LVDS LCD capabilities
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[2] LVDS LCD capabilities (PWD)
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[1] LVDS LCD capabilities (PWD)
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[0] LVDS=1, TMDS=0 (SiS or third party)
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*/
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/* CR7E - 661 and later
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VBType:
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[7] LVDS (third party)
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[3] 301C
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[2] 302LV
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[1] 301LV
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[0] 301B
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*/
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/* LCDResInfo */
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#define Panel300_800x600 0x01 /* CR36 */
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#define Panel300_1024x768 0x02
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#define Panel300_1280x1024 0x03
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#define Panel300_1280x960 0x04
|
|
#define Panel300_640x480 0x05
|
|
#define Panel300_1024x600 0x06
|
|
#define Panel300_1152x768 0x07
|
|
#define Panel300_1280x768 0x0a
|
|
#define Panel300_Custom 0x0f
|
|
#define Panel300_Barco1366 0x10
|
|
|
|
#define Panel310_800x600 0x01
|
|
#define Panel310_1024x768 0x02
|
|
#define Panel310_1280x1024 0x03
|
|
#define Panel310_640x480 0x04
|
|
#define Panel310_1024x600 0x05
|
|
#define Panel310_1152x864 0x06
|
|
#define Panel310_1280x960 0x07
|
|
#define Panel310_1152x768 0x08 /* LVDS only */
|
|
#define Panel310_1400x1050 0x09
|
|
#define Panel310_1280x768 0x0a
|
|
#define Panel310_1600x1200 0x0b
|
|
#define Panel310_320x240_2 0x0c /* xSTN */
|
|
#define Panel310_320x240_3 0x0d /* xSTN */
|
|
#define Panel310_320x240_1 0x0e /* xSTN - This is fake, can be any */
|
|
#define Panel310_Custom 0x0f
|
|
|
|
#define Panel661_800x600 0x01
|
|
#define Panel661_1024x768 0x02
|
|
#define Panel661_1280x1024 0x03
|
|
#define Panel661_640x480 0x04
|
|
#define Panel661_1024x600 0x05
|
|
#define Panel661_1152x864 0x06
|
|
#define Panel661_1280x960 0x07
|
|
#define Panel661_1280x854 0x08
|
|
#define Panel661_1400x1050 0x09
|
|
#define Panel661_1280x768 0x0a
|
|
#define Panel661_1600x1200 0x0b
|
|
#define Panel661_1280x800 0x0c
|
|
#define Panel661_1680x1050 0x0d
|
|
#define Panel661_1280x720 0x0e
|
|
#define Panel661_Custom 0x0f
|
|
|
|
#define Panel_800x600 0x01 /* Unified values */
|
|
#define Panel_1024x768 0x02 /* MUST match BIOS values from 0-e */
|
|
#define Panel_1280x1024 0x03
|
|
#define Panel_640x480 0x04
|
|
#define Panel_1024x600 0x05
|
|
#define Panel_1152x864 0x06
|
|
#define Panel_1280x960 0x07
|
|
#define Panel_1152x768 0x08 /* LVDS only */
|
|
#define Panel_1400x1050 0x09
|
|
#define Panel_1280x768 0x0a /* 30xB/C and LVDS only (BIOS: all) */
|
|
#define Panel_1600x1200 0x0b
|
|
#define Panel_1280x800 0x0c /* 661etc (TMDS) */
|
|
#define Panel_1680x1050 0x0d /* 661etc */
|
|
#define Panel_1280x720 0x0e /* 661etc */
|
|
#define Panel_Custom 0x0f /* MUST BE 0x0f (for DVI DDC detection) */
|
|
#define Panel_320x240_1 0x10 /* SiS 550 xSTN */
|
|
#define Panel_Barco1366 0x11
|
|
#define Panel_848x480 0x12
|
|
#define Panel_320x240_2 0x13 /* SiS 550 xSTN */
|
|
#define Panel_320x240_3 0x14 /* SiS 550 xSTN */
|
|
#define Panel_1280x768_2 0x15 /* 30xLV */
|
|
#define Panel_1280x768_3 0x16 /* (unused) */
|
|
#define Panel_1280x800_2 0x17 /* 30xLV */
|
|
#define Panel_856x480 0x18
|
|
#define Panel_1280x854 0x19 /* 661etc */
|
|
|
|
/* Index in ModeResInfo table */
|
|
#define SIS_RI_320x200 0
|
|
#define SIS_RI_320x240 1
|
|
#define SIS_RI_320x400 2
|
|
#define SIS_RI_400x300 3
|
|
#define SIS_RI_512x384 4
|
|
#define SIS_RI_640x400 5
|
|
#define SIS_RI_640x480 6
|
|
#define SIS_RI_800x600 7
|
|
#define SIS_RI_1024x768 8
|
|
#define SIS_RI_1280x1024 9
|
|
#define SIS_RI_1600x1200 10
|
|
#define SIS_RI_1920x1440 11
|
|
#define SIS_RI_2048x1536 12
|
|
#define SIS_RI_720x480 13
|
|
#define SIS_RI_720x576 14
|
|
#define SIS_RI_1280x960 15
|
|
#define SIS_RI_800x480 16
|
|
#define SIS_RI_1024x576 17
|
|
#define SIS_RI_1280x720 18
|
|
#define SIS_RI_856x480 19
|
|
#define SIS_RI_1280x768 20
|
|
#define SIS_RI_1400x1050 21
|
|
#define SIS_RI_1152x864 22 /* Up to here SiS conforming */
|
|
#define SIS_RI_848x480 23
|
|
#define SIS_RI_1360x768 24
|
|
#define SIS_RI_1024x600 25
|
|
#define SIS_RI_1152x768 26
|
|
#define SIS_RI_768x576 27
|
|
#define SIS_RI_1360x1024 28
|
|
#define SIS_RI_1680x1050 29
|
|
#define SIS_RI_1280x800 30
|
|
#define SIS_RI_1920x1080 31
|
|
#define SIS_RI_960x540 32
|
|
#define SIS_RI_960x600 33
|
|
#define SIS_RI_1280x854 34
|
|
|
|
/* CR5F */
|
|
#define IsM650 0x80
|
|
|
|
/* Timing data */
|
|
#define NTSCHT 1716
|
|
#define NTSC2HT 1920
|
|
#define NTSCVT 525
|
|
#define PALHT 1728
|
|
#define PALVT 625
|
|
#define StHiTVHT 892
|
|
#define StHiTVVT 1126
|
|
#define StHiTextTVHT 1000
|
|
#define StHiTextTVVT 1126
|
|
#define ExtHiTVHT 2100
|
|
#define ExtHiTVVT 1125
|
|
|
|
/* Indices in (VB)VCLKData tables */
|
|
|
|
#define VCLK28 0x00 /* Index in VCLKData table (300 and 315) */
|
|
#define VCLK40 0x04 /* Index in VCLKData table (300 and 315) */
|
|
#define VCLK65_300 0x09 /* Index in VCLKData table (300) */
|
|
#define VCLK108_2_300 0x14 /* Index in VCLKData table (300) */
|
|
#define VCLK81_300 0x3f /* Index in VCLKData table (300) */
|
|
#define VCLK108_3_300 0x42 /* Index in VCLKData table (300) */
|
|
#define VCLK100_300 0x43 /* Index in VCLKData table (300) */
|
|
#define VCLK34_300 0x3d /* Index in VCLKData table (300) */
|
|
#define VCLK_CUSTOM_300 0x47
|
|
|
|
#define VCLK65_315 0x0b /* Indices in (VB)VCLKData table (315) */
|
|
#define VCLK108_2_315 0x19
|
|
#define VCLK81_315 0x5b
|
|
#define VCLK162_315 0x5e
|
|
#define VCLK108_3_315 0x45
|
|
#define VCLK100_315 0x46
|
|
#define VCLK34_315 0x55
|
|
#define VCLK68_315 0x0d
|
|
#define VCLK_1280x800_315_2 0x5c
|
|
#define VCLK121_315 0x5d
|
|
#define VCLK130_315 0x72
|
|
#define VCLK_1280x720 0x5f
|
|
#define VCLK_1280x768_2 0x60
|
|
#define VCLK_1280x768_3 0x61 /* (unused?) */
|
|
#define VCLK_CUSTOM_315 0x62
|
|
#define VCLK_1280x720_2 0x63
|
|
#define VCLK_720x480 0x67
|
|
#define VCLK_720x576 0x68
|
|
#define VCLK_768x576 0x68
|
|
#define VCLK_848x480 0x65
|
|
#define VCLK_856x480 0x66
|
|
#define VCLK_800x480 0x65
|
|
#define VCLK_1024x576 0x51
|
|
#define VCLK_1152x864 0x64
|
|
#define VCLK_1360x768 0x58
|
|
#define VCLK_1280x800_315 0x6c
|
|
#define VCLK_1280x854 0x76
|
|
|
|
#define TVCLKBASE_300 0x21 /* Indices on TV clocks in VCLKData table (300) */
|
|
#define TVCLKBASE_315 0x3a /* Indices on TV clocks in (VB)VCLKData table (315) */
|
|
#define TVVCLKDIV2 0x00 /* Index relative to TVCLKBASE */
|
|
#define TVVCLK 0x01 /* Index relative to TVCLKBASE */
|
|
#define HiTVVCLKDIV2 0x02 /* Index relative to TVCLKBASE */
|
|
#define HiTVVCLK 0x03 /* Index relative to TVCLKBASE */
|
|
#define HiTVSimuVCLK 0x04 /* Index relative to TVCLKBASE */
|
|
#define HiTVTextVCLK 0x05 /* Index relative to TVCLKBASE */
|
|
#define YPbPr750pVCLK 0x25 /* Index relative to TVCLKBASE; was 0x0f NOT relative */
|
|
|
|
/* ------------------------------ */
|
|
|
|
#define SetSCARTOutput 0x01
|
|
|
|
#define HotPlugFunction 0x08
|
|
|
|
#define StStructSize 0x06
|
|
|
|
#define SIS_VIDEO_CAPTURE 0x00 - 0x30
|
|
#define SIS_VIDEO_PLAYBACK 0x02 - 0x30
|
|
#define SIS_CRT2_PORT_04 0x04 - 0x30
|
|
#define SIS_CRT2_PORT_10 0x10 - 0x30
|
|
#define SIS_CRT2_PORT_12 0x12 - 0x30
|
|
#define SIS_CRT2_PORT_14 0x14 - 0x30
|
|
|
|
#define ADR_CRT2PtrData 0x20E
|
|
#define offset_Zurac 0x210 /* TW: Trumpion Zurac data pointer */
|
|
#define ADR_LVDSDesPtrData 0x212
|
|
#define ADR_LVDSCRT1DataPtr 0x214
|
|
#define ADR_CHTVVCLKPtr 0x216
|
|
#define ADR_CHTVRegDataPtr 0x218
|
|
|
|
#define LCDDataLen 8
|
|
#define HiTVDataLen 12
|
|
#define TVDataLen 16
|
|
|
|
#define LVDSDataLen 6
|
|
#define LVDSDesDataLen 3
|
|
#define ActiveNonExpanding 0x40
|
|
#define ActiveNonExpandingShift 6
|
|
#define ActivePAL 0x20
|
|
#define ActivePALShift 5
|
|
#define ModeSwitchStatus 0x0F
|
|
#define SoftTVType 0x40
|
|
#define SoftSettingAddr 0x52
|
|
#define ModeSettingAddr 0x53
|
|
|
|
#define _PanelType00 0x00
|
|
#define _PanelType01 0x08
|
|
#define _PanelType02 0x10
|
|
#define _PanelType03 0x18
|
|
#define _PanelType04 0x20
|
|
#define _PanelType05 0x28
|
|
#define _PanelType06 0x30
|
|
#define _PanelType07 0x38
|
|
#define _PanelType08 0x40
|
|
#define _PanelType09 0x48
|
|
#define _PanelType0A 0x50
|
|
#define _PanelType0B 0x58
|
|
#define _PanelType0C 0x60
|
|
#define _PanelType0D 0x68
|
|
#define _PanelType0E 0x70
|
|
#define _PanelType0F 0x78
|
|
|
|
#define PRIMARY_VGA 0 /* 1: SiS is primary vga 0:SiS is secondary vga */
|
|
|
|
#define BIOSIDCodeAddr 0x235 /* Offsets to ptrs in BIOS image */
|
|
#define OEMUtilIDCodeAddr 0x237
|
|
#define VBModeIDTableAddr 0x239
|
|
#define OEMTVPtrAddr 0x241
|
|
#define PhaseTableAddr 0x243
|
|
#define NTSCFilterTableAddr 0x245
|
|
#define PALFilterTableAddr 0x247
|
|
#define OEMLCDPtr_1Addr 0x249
|
|
#define OEMLCDPtr_2Addr 0x24B
|
|
#define LCDHPosTable_1Addr 0x24D
|
|
#define LCDHPosTable_2Addr 0x24F
|
|
#define LCDVPosTable_1Addr 0x251
|
|
#define LCDVPosTable_2Addr 0x253
|
|
#define OEMLCDPIDTableAddr 0x255
|
|
|
|
#define VBModeStructSize 5
|
|
#define PhaseTableSize 4
|
|
#define FilterTableSize 4
|
|
#define LCDHPosTableSize 7
|
|
#define LCDVPosTableSize 5
|
|
#define OEMLVDSPIDTableSize 4
|
|
#define LVDSHPosTableSize 4
|
|
#define LVDSVPosTableSize 6
|
|
|
|
#define VB_ModeID 0
|
|
#define VB_TVTableIndex 1
|
|
#define VB_LCDTableIndex 2
|
|
#define VB_LCDHIndex 3
|
|
#define VB_LCDVIndex 4
|
|
|
|
#define OEMLCDEnable 0x0001
|
|
#define OEMLCDDelayEnable 0x0002
|
|
#define OEMLCDPOSEnable 0x0004
|
|
#define OEMTVEnable 0x0100
|
|
#define OEMTVDelayEnable 0x0200
|
|
#define OEMTVFlickerEnable 0x0400
|
|
#define OEMTVPhaseEnable 0x0800
|
|
#define OEMTVFilterEnable 0x1000
|
|
|
|
#define OEMLCDPanelIDSupport 0x0080
|
|
|
|
/*
|
|
=============================================================
|
|
for 315 series (old data layout)
|
|
=============================================================
|
|
*/
|
|
#define SoftDRAMType 0x80
|
|
#define SoftSetting_OFFSET 0x52
|
|
#define SR07_OFFSET 0x7C
|
|
#define SR15_OFFSET 0x7D
|
|
#define SR16_OFFSET 0x81
|
|
#define SR17_OFFSET 0x85
|
|
#define SR19_OFFSET 0x8D
|
|
#define SR1F_OFFSET 0x99
|
|
#define SR21_OFFSET 0x9A
|
|
#define SR22_OFFSET 0x9B
|
|
#define SR23_OFFSET 0x9C
|
|
#define SR24_OFFSET 0x9D
|
|
#define SR25_OFFSET 0x9E
|
|
#define SR31_OFFSET 0x9F
|
|
#define SR32_OFFSET 0xA0
|
|
#define SR33_OFFSET 0xA1
|
|
|
|
#define CR40_OFFSET 0xA2
|
|
#define SR25_1_OFFSET 0xF6
|
|
#define CR49_OFFSET 0xF7
|
|
|
|
#define VB310Data_1_2_Offset 0xB6
|
|
#define VB310Data_4_D_Offset 0xB7
|
|
#define VB310Data_4_E_Offset 0xB8
|
|
#define VB310Data_4_10_Offset 0xBB
|
|
|
|
#define RGBSenseDataOffset 0xBD
|
|
#define YCSenseDataOffset 0xBF
|
|
#define VideoSenseDataOffset 0xC1
|
|
#define OutputSelectOffset 0xF3
|
|
|
|
#define ECLK_MCLK_DISTANCE 0x14
|
|
#define VBIOSTablePointerStart 0x100
|
|
#define StandTablePtrOffset VBIOSTablePointerStart+0x02
|
|
#define EModeIDTablePtrOffset VBIOSTablePointerStart+0x04
|
|
#define CRT1TablePtrOffset VBIOSTablePointerStart+0x06
|
|
#define ScreenOffsetPtrOffset VBIOSTablePointerStart+0x08
|
|
#define VCLKDataPtrOffset VBIOSTablePointerStart+0x0A
|
|
#define MCLKDataPtrOffset VBIOSTablePointerStart+0x0E
|
|
#define CRT2PtrDataPtrOffset VBIOSTablePointerStart+0x10
|
|
#define TVAntiFlickPtrOffset VBIOSTablePointerStart+0x12
|
|
#define TVDelayPtr1Offset VBIOSTablePointerStart+0x14
|
|
#define TVPhaseIncrPtr1Offset VBIOSTablePointerStart+0x16
|
|
#define TVYFilterPtr1Offset VBIOSTablePointerStart+0x18
|
|
#define LCDDelayPtr1Offset VBIOSTablePointerStart+0x20
|
|
#define TVEdgePtr1Offset VBIOSTablePointerStart+0x24
|
|
#define CRT2Delay1Offset VBIOSTablePointerStart+0x28
|
|
|
|
#endif
|