mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
1c6ccad8a4
Guest OS driver uses PV info registers to deliver cursor hotspot info to host. This patch is used to get cursor hotspot info from virtual registers and deliver it to host userspace. v4->v5: - remove CI warning. v3->v4: - return UINT_MAX when x_hot/y_hot is invalid. (Zhenyu) - correct version. v2->v3: - add validate_hotspot(). (Zhenyu) v1->v2: - name as cursor_x_hot/cursor_y_hot. (Zhenyu) - use i915_reg_t definition instead of magic numbers. (Zhenyu) Signed-off-by: Tina Zhang <tina.zhang@intel.com> Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: Zhi Wang <zhi.a.wang@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
548 lines
14 KiB
C
548 lines
14 KiB
C
/*
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* Copyright 2017 Intel Corporation. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Zhiyuan Lv <zhiyuan.lv@intel.com>
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*
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* Contributors:
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* Xiaoguang Chen
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* Tina Zhang <tina.zhang@intel.com>
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*/
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#include <linux/dma-buf.h>
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#include <drm/drmP.h>
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#include <linux/vfio.h>
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#include "i915_drv.h"
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#include "gvt.h"
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#define GEN8_DECODE_PTE(pte) (pte & GENMASK_ULL(63, 12))
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static int vgpu_gem_get_pages(
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struct drm_i915_gem_object *obj)
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{
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struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
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struct sg_table *st;
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struct scatterlist *sg;
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int i, ret;
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gen8_pte_t __iomem *gtt_entries;
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struct intel_vgpu_fb_info *fb_info;
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fb_info = (struct intel_vgpu_fb_info *)obj->gvt_info;
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if (WARN_ON(!fb_info))
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return -ENODEV;
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st = kmalloc(sizeof(*st), GFP_KERNEL);
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if (unlikely(!st))
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return -ENOMEM;
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ret = sg_alloc_table(st, fb_info->size, GFP_KERNEL);
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if (ret) {
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kfree(st);
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return ret;
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}
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gtt_entries = (gen8_pte_t __iomem *)dev_priv->ggtt.gsm +
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(fb_info->start >> PAGE_SHIFT);
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for_each_sg(st->sgl, sg, fb_info->size, i) {
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sg->offset = 0;
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sg->length = PAGE_SIZE;
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sg_dma_address(sg) =
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GEN8_DECODE_PTE(readq(>t_entries[i]));
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sg_dma_len(sg) = PAGE_SIZE;
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}
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__i915_gem_object_set_pages(obj, st, PAGE_SIZE);
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return 0;
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}
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static void vgpu_gem_put_pages(struct drm_i915_gem_object *obj,
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struct sg_table *pages)
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{
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sg_free_table(pages);
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kfree(pages);
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}
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static void dmabuf_gem_object_free(struct kref *kref)
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{
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struct intel_vgpu_dmabuf_obj *obj =
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container_of(kref, struct intel_vgpu_dmabuf_obj, kref);
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struct intel_vgpu *vgpu = obj->vgpu;
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struct list_head *pos;
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struct intel_vgpu_dmabuf_obj *dmabuf_obj;
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if (vgpu && vgpu->active && !list_empty(&vgpu->dmabuf_obj_list_head)) {
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list_for_each(pos, &vgpu->dmabuf_obj_list_head) {
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dmabuf_obj = container_of(pos,
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struct intel_vgpu_dmabuf_obj, list);
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if (dmabuf_obj == obj) {
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intel_gvt_hypervisor_put_vfio_device(vgpu);
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idr_remove(&vgpu->object_idr,
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dmabuf_obj->dmabuf_id);
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kfree(dmabuf_obj->info);
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kfree(dmabuf_obj);
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list_del(pos);
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break;
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}
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}
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} else {
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/* Free the orphan dmabuf_objs here */
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kfree(obj->info);
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kfree(obj);
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}
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}
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static inline void dmabuf_obj_get(struct intel_vgpu_dmabuf_obj *obj)
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{
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kref_get(&obj->kref);
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}
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static inline void dmabuf_obj_put(struct intel_vgpu_dmabuf_obj *obj)
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{
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kref_put(&obj->kref, dmabuf_gem_object_free);
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}
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static void vgpu_gem_release(struct drm_i915_gem_object *gem_obj)
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{
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struct intel_vgpu_fb_info *fb_info = gem_obj->gvt_info;
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struct intel_vgpu_dmabuf_obj *obj = fb_info->obj;
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struct intel_vgpu *vgpu = obj->vgpu;
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if (vgpu) {
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mutex_lock(&vgpu->dmabuf_lock);
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gem_obj->base.dma_buf = NULL;
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dmabuf_obj_put(obj);
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mutex_unlock(&vgpu->dmabuf_lock);
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} else {
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/* vgpu is NULL, as it has been removed already */
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gem_obj->base.dma_buf = NULL;
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dmabuf_obj_put(obj);
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}
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}
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static const struct drm_i915_gem_object_ops intel_vgpu_gem_ops = {
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.flags = I915_GEM_OBJECT_IS_PROXY,
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.get_pages = vgpu_gem_get_pages,
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.put_pages = vgpu_gem_put_pages,
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.release = vgpu_gem_release,
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};
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static struct drm_i915_gem_object *vgpu_create_gem(struct drm_device *dev,
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struct intel_vgpu_fb_info *info)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct drm_i915_gem_object *obj;
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obj = i915_gem_object_alloc(dev_priv);
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if (obj == NULL)
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return NULL;
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drm_gem_private_object_init(dev, &obj->base,
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info->size << PAGE_SHIFT);
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i915_gem_object_init(obj, &intel_vgpu_gem_ops);
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obj->read_domains = I915_GEM_DOMAIN_GTT;
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obj->write_domain = 0;
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if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
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unsigned int tiling_mode = 0;
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unsigned int stride = 0;
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switch (info->drm_format_mod << 10) {
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case PLANE_CTL_TILED_LINEAR:
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tiling_mode = I915_TILING_NONE;
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break;
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case PLANE_CTL_TILED_X:
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tiling_mode = I915_TILING_X;
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stride = info->stride;
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break;
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case PLANE_CTL_TILED_Y:
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tiling_mode = I915_TILING_Y;
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stride = info->stride;
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break;
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default:
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gvt_dbg_core("not supported tiling mode\n");
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}
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obj->tiling_and_stride = tiling_mode | stride;
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} else {
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obj->tiling_and_stride = info->drm_format_mod ?
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I915_TILING_X : 0;
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}
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return obj;
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}
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static bool validate_hotspot(struct intel_vgpu_cursor_plane_format *c)
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{
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if (c && c->x_hot <= c->width && c->y_hot <= c->height)
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return true;
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else
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return false;
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}
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static int vgpu_get_plane_info(struct drm_device *dev,
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struct intel_vgpu *vgpu,
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struct intel_vgpu_fb_info *info,
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int plane_id)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_vgpu_primary_plane_format p;
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struct intel_vgpu_cursor_plane_format c;
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int ret;
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if (plane_id == DRM_PLANE_TYPE_PRIMARY) {
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ret = intel_vgpu_decode_primary_plane(vgpu, &p);
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if (ret)
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return ret;
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info->start = p.base;
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info->start_gpa = p.base_gpa;
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info->width = p.width;
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info->height = p.height;
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info->stride = p.stride;
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info->drm_format = p.drm_format;
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info->drm_format_mod = p.tiled;
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info->size = (((p.stride * p.height * p.bpp) / 8) +
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(PAGE_SIZE - 1)) >> PAGE_SHIFT;
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} else if (plane_id == DRM_PLANE_TYPE_CURSOR) {
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ret = intel_vgpu_decode_cursor_plane(vgpu, &c);
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if (ret)
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return ret;
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info->start = c.base;
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info->start_gpa = c.base_gpa;
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info->width = c.width;
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info->height = c.height;
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info->stride = c.width * (c.bpp / 8);
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info->drm_format = c.drm_format;
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info->drm_format_mod = 0;
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info->x_pos = c.x_pos;
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info->y_pos = c.y_pos;
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if (validate_hotspot(&c)) {
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info->x_hot = c.x_hot;
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info->y_hot = c.y_hot;
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} else {
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info->x_hot = UINT_MAX;
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info->y_hot = UINT_MAX;
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}
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info->size = (((info->stride * c.height * c.bpp) / 8)
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+ (PAGE_SIZE - 1)) >> PAGE_SHIFT;
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} else {
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gvt_vgpu_err("invalid plane id:%d\n", plane_id);
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return -EINVAL;
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}
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if (info->size == 0) {
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gvt_vgpu_err("fb size is zero\n");
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return -EINVAL;
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}
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if (info->start & (PAGE_SIZE - 1)) {
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gvt_vgpu_err("Not aligned fb address:0x%llx\n", info->start);
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return -EFAULT;
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}
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if (((info->start >> PAGE_SHIFT) + info->size) >
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ggtt_total_entries(&dev_priv->ggtt)) {
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gvt_vgpu_err("Invalid GTT offset or size\n");
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return -EFAULT;
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}
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if (!intel_gvt_ggtt_validate_range(vgpu, info->start, info->size)) {
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gvt_vgpu_err("invalid gma addr\n");
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return -EFAULT;
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}
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return 0;
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}
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static struct intel_vgpu_dmabuf_obj *
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pick_dmabuf_by_info(struct intel_vgpu *vgpu,
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struct intel_vgpu_fb_info *latest_info)
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{
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struct list_head *pos;
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struct intel_vgpu_fb_info *fb_info;
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struct intel_vgpu_dmabuf_obj *dmabuf_obj = NULL;
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struct intel_vgpu_dmabuf_obj *ret = NULL;
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list_for_each(pos, &vgpu->dmabuf_obj_list_head) {
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dmabuf_obj = container_of(pos, struct intel_vgpu_dmabuf_obj,
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list);
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if ((dmabuf_obj == NULL) ||
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(dmabuf_obj->info == NULL))
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continue;
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fb_info = (struct intel_vgpu_fb_info *)dmabuf_obj->info;
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if ((fb_info->start == latest_info->start) &&
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(fb_info->start_gpa == latest_info->start_gpa) &&
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(fb_info->size == latest_info->size) &&
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(fb_info->drm_format_mod == latest_info->drm_format_mod) &&
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(fb_info->drm_format == latest_info->drm_format) &&
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(fb_info->width == latest_info->width) &&
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(fb_info->height == latest_info->height)) {
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ret = dmabuf_obj;
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break;
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}
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}
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return ret;
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}
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static struct intel_vgpu_dmabuf_obj *
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pick_dmabuf_by_num(struct intel_vgpu *vgpu, u32 id)
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{
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struct list_head *pos;
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struct intel_vgpu_dmabuf_obj *dmabuf_obj = NULL;
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struct intel_vgpu_dmabuf_obj *ret = NULL;
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list_for_each(pos, &vgpu->dmabuf_obj_list_head) {
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dmabuf_obj = container_of(pos, struct intel_vgpu_dmabuf_obj,
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list);
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if (!dmabuf_obj)
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continue;
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if (dmabuf_obj->dmabuf_id == id) {
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ret = dmabuf_obj;
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break;
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}
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}
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return ret;
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}
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static void update_fb_info(struct vfio_device_gfx_plane_info *gvt_dmabuf,
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struct intel_vgpu_fb_info *fb_info)
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{
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gvt_dmabuf->drm_format = fb_info->drm_format;
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gvt_dmabuf->drm_format_mod = fb_info->drm_format_mod;
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gvt_dmabuf->width = fb_info->width;
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gvt_dmabuf->height = fb_info->height;
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gvt_dmabuf->stride = fb_info->stride;
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gvt_dmabuf->size = fb_info->size;
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gvt_dmabuf->x_pos = fb_info->x_pos;
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gvt_dmabuf->y_pos = fb_info->y_pos;
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gvt_dmabuf->x_hot = fb_info->x_hot;
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gvt_dmabuf->y_hot = fb_info->y_hot;
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}
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int intel_vgpu_query_plane(struct intel_vgpu *vgpu, void *args)
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{
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struct drm_device *dev = &vgpu->gvt->dev_priv->drm;
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struct vfio_device_gfx_plane_info *gfx_plane_info = args;
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struct intel_vgpu_dmabuf_obj *dmabuf_obj;
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struct intel_vgpu_fb_info fb_info;
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int ret = 0;
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if (gfx_plane_info->flags == (VFIO_GFX_PLANE_TYPE_DMABUF |
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VFIO_GFX_PLANE_TYPE_PROBE))
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return ret;
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else if ((gfx_plane_info->flags & ~VFIO_GFX_PLANE_TYPE_DMABUF) ||
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(!gfx_plane_info->flags))
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return -EINVAL;
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ret = vgpu_get_plane_info(dev, vgpu, &fb_info,
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gfx_plane_info->drm_plane_type);
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if (ret != 0)
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goto out;
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mutex_lock(&vgpu->dmabuf_lock);
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/* If exists, pick up the exposed dmabuf_obj */
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dmabuf_obj = pick_dmabuf_by_info(vgpu, &fb_info);
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if (dmabuf_obj) {
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update_fb_info(gfx_plane_info, &fb_info);
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gfx_plane_info->dmabuf_id = dmabuf_obj->dmabuf_id;
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/* This buffer may be released between query_plane ioctl and
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* get_dmabuf ioctl. Add the refcount to make sure it won't
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* be released between the two ioctls.
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*/
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if (!dmabuf_obj->initref) {
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dmabuf_obj->initref = true;
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dmabuf_obj_get(dmabuf_obj);
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}
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ret = 0;
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gvt_dbg_dpy("vgpu%d: re-use dmabuf_obj ref %d, id %d\n",
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vgpu->id, kref_read(&dmabuf_obj->kref),
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gfx_plane_info->dmabuf_id);
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mutex_unlock(&vgpu->dmabuf_lock);
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goto out;
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}
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mutex_unlock(&vgpu->dmabuf_lock);
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/* Need to allocate a new one*/
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dmabuf_obj = kmalloc(sizeof(struct intel_vgpu_dmabuf_obj), GFP_KERNEL);
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if (unlikely(!dmabuf_obj)) {
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gvt_vgpu_err("alloc dmabuf_obj failed\n");
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ret = -ENOMEM;
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goto out;
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}
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dmabuf_obj->info = kmalloc(sizeof(struct intel_vgpu_fb_info),
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GFP_KERNEL);
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if (unlikely(!dmabuf_obj->info)) {
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gvt_vgpu_err("allocate intel vgpu fb info failed\n");
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ret = -ENOMEM;
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goto out_free_dmabuf;
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}
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memcpy(dmabuf_obj->info, &fb_info, sizeof(struct intel_vgpu_fb_info));
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((struct intel_vgpu_fb_info *)dmabuf_obj->info)->obj = dmabuf_obj;
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dmabuf_obj->vgpu = vgpu;
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ret = idr_alloc(&vgpu->object_idr, dmabuf_obj, 1, 0, GFP_NOWAIT);
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if (ret < 0)
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goto out_free_info;
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gfx_plane_info->dmabuf_id = ret;
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dmabuf_obj->dmabuf_id = ret;
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dmabuf_obj->initref = true;
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kref_init(&dmabuf_obj->kref);
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mutex_lock(&vgpu->dmabuf_lock);
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if (intel_gvt_hypervisor_get_vfio_device(vgpu)) {
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gvt_vgpu_err("get vfio device failed\n");
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mutex_unlock(&vgpu->dmabuf_lock);
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goto out_free_info;
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}
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mutex_unlock(&vgpu->dmabuf_lock);
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update_fb_info(gfx_plane_info, &fb_info);
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INIT_LIST_HEAD(&dmabuf_obj->list);
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mutex_lock(&vgpu->dmabuf_lock);
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list_add_tail(&dmabuf_obj->list, &vgpu->dmabuf_obj_list_head);
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mutex_unlock(&vgpu->dmabuf_lock);
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gvt_dbg_dpy("vgpu%d: %s new dmabuf_obj ref %d, id %d\n", vgpu->id,
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__func__, kref_read(&dmabuf_obj->kref), ret);
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return 0;
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out_free_info:
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kfree(dmabuf_obj->info);
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out_free_dmabuf:
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kfree(dmabuf_obj);
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out:
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/* ENODEV means plane isn't ready, which might be a normal case. */
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return (ret == -ENODEV) ? 0 : ret;
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}
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/* To associate an exposed dmabuf with the dmabuf_obj */
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int intel_vgpu_get_dmabuf(struct intel_vgpu *vgpu, unsigned int dmabuf_id)
|
|
{
|
|
struct drm_device *dev = &vgpu->gvt->dev_priv->drm;
|
|
struct intel_vgpu_dmabuf_obj *dmabuf_obj;
|
|
struct drm_i915_gem_object *obj;
|
|
struct dma_buf *dmabuf;
|
|
int dmabuf_fd;
|
|
int ret = 0;
|
|
|
|
mutex_lock(&vgpu->dmabuf_lock);
|
|
|
|
dmabuf_obj = pick_dmabuf_by_num(vgpu, dmabuf_id);
|
|
if (dmabuf_obj == NULL) {
|
|
gvt_vgpu_err("invalid dmabuf id:%d\n", dmabuf_id);
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
obj = vgpu_create_gem(dev, dmabuf_obj->info);
|
|
if (obj == NULL) {
|
|
gvt_vgpu_err("create gvt gem obj failed\n");
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
obj->gvt_info = dmabuf_obj->info;
|
|
|
|
dmabuf = i915_gem_prime_export(dev, &obj->base, DRM_CLOEXEC | DRM_RDWR);
|
|
if (IS_ERR(dmabuf)) {
|
|
gvt_vgpu_err("export dma-buf failed\n");
|
|
ret = PTR_ERR(dmabuf);
|
|
goto out_free_gem;
|
|
}
|
|
|
|
i915_gem_object_put(obj);
|
|
|
|
ret = dma_buf_fd(dmabuf, DRM_CLOEXEC | DRM_RDWR);
|
|
if (ret < 0) {
|
|
gvt_vgpu_err("create dma-buf fd failed ret:%d\n", ret);
|
|
goto out_free_dmabuf;
|
|
}
|
|
dmabuf_fd = ret;
|
|
|
|
dmabuf_obj_get(dmabuf_obj);
|
|
|
|
if (dmabuf_obj->initref) {
|
|
dmabuf_obj->initref = false;
|
|
dmabuf_obj_put(dmabuf_obj);
|
|
}
|
|
|
|
mutex_unlock(&vgpu->dmabuf_lock);
|
|
|
|
gvt_dbg_dpy("vgpu%d: dmabuf:%d, dmabuf ref %d, fd:%d\n"
|
|
" file count: %ld, GEM ref: %d\n",
|
|
vgpu->id, dmabuf_obj->dmabuf_id,
|
|
kref_read(&dmabuf_obj->kref),
|
|
dmabuf_fd,
|
|
file_count(dmabuf->file),
|
|
kref_read(&obj->base.refcount));
|
|
|
|
return dmabuf_fd;
|
|
|
|
out_free_dmabuf:
|
|
dma_buf_put(dmabuf);
|
|
out_free_gem:
|
|
i915_gem_object_put(obj);
|
|
out:
|
|
mutex_unlock(&vgpu->dmabuf_lock);
|
|
return ret;
|
|
}
|
|
|
|
void intel_vgpu_dmabuf_cleanup(struct intel_vgpu *vgpu)
|
|
{
|
|
struct list_head *pos, *n;
|
|
struct intel_vgpu_dmabuf_obj *dmabuf_obj;
|
|
|
|
mutex_lock(&vgpu->dmabuf_lock);
|
|
list_for_each_safe(pos, n, &vgpu->dmabuf_obj_list_head) {
|
|
dmabuf_obj = container_of(pos, struct intel_vgpu_dmabuf_obj,
|
|
list);
|
|
dmabuf_obj->vgpu = NULL;
|
|
|
|
idr_remove(&vgpu->object_idr, dmabuf_obj->dmabuf_id);
|
|
intel_gvt_hypervisor_put_vfio_device(vgpu);
|
|
list_del(pos);
|
|
|
|
/* dmabuf_obj might be freed in dmabuf_obj_put */
|
|
if (dmabuf_obj->initref) {
|
|
dmabuf_obj->initref = false;
|
|
dmabuf_obj_put(dmabuf_obj);
|
|
}
|
|
|
|
}
|
|
mutex_unlock(&vgpu->dmabuf_lock);
|
|
}
|